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Proceedings Paper

Optimized shielded-gate trench MOSFET technology for high-frequency, high-efficiency power supplies
Author(s): Ashok Challa; Tirthajyoti Sarkar; Steven Sapp
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Paper Abstract

Shielded-gate trench-MOSFETs yield superior performance compared to conventional gate trench devices by allowing higher doping density in the drift region and providing a ‘shielding effect’ for the gate by placing an intermediate electrode between gate and drain. However, further design optimizations can be done for a shieldedgate trench-MOSFET to improve performance parameters particularly suited for next-generation high-frequency computing power supply applications and they have been outlined in this article. Channel optimization, substrate thinning and intrinsic gate resistance reduction (by layout enhancements) have been discussed along with their impact on cost-performance benefit on the device. Further, effects of these design optimizations on the power loss and efficiency of a high-frequency switching converter have been demonstrated by mixed device–circuit simulations.

Paper Details

Date Published: 15 October 2012
PDF: 7 pages
Proc. SPIE 8549, 16th International Workshop on Physics of Semiconductor Devices, 85490H (15 October 2012); doi: 10.1117/12.923768
Show Author Affiliations
Ashok Challa, Fairchild Semiconductor (United States)
Tirthajyoti Sarkar, Fairchild Semiconductor (India)
Steven Sapp, Fairchild Semiconductor (United States)


Published in SPIE Proceedings Vol. 8549:
16th International Workshop on Physics of Semiconductor Devices
Monica Katiyar; B. Mazhari; Y N Mohapatra, Editor(s)

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