Share Email Print

Proceedings Paper

New integration concept of PIN photodiodes in 0.35um CMOS technologies
Author(s): I. Jonak-Auer; J. Teva; J. M. Park; S. Jessenig; M. Rohrbacher; E. Wachmann
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

We report on a new and very cost effective way to integrate PIN photo detectors into a standard CMOS process. Starting with lowly p-doped (intrinsic) EPI we need just one additional mask and ion implantation in order to provide doping concentrations very similar to standard CMOS substrates to areas outside the photoactive regions. Thus full functionality of the standard CMOS logic can be guaranteed while the photo detectors highly benefit from the low doping concentrations of the intrinsic EPI. The major advantage of this integration concept is that complete modularity of the CMOS process remains untouched by the implementation of PIN photodiodes. Functionality of the implanted region as host of logic components was confirmed by electrical measurements of relevant standard transistor as well as ESD protection devices. We also succeeded in establishing an EPI deposition process in austriamicrosystems 200mm wafer fabrication which guarantees the formation of very lowly p-doped intrinsic layers, which major semiconductor vendors could not provide. With our EPI deposition process we acquire doping levels as low as 1•1012/cm3. In order to maintain those doping levels during CMOS processing we employed special surface protection techniques. After complete CMOS processing doping concentrations were about 4•1013/cm3 at the EPI surface while the bulk EPI kept its original low doping concentrations. Photodiode parameters could further be improved by bottom antireflective coatings and a special implant to reduce dark currents. For 100×100μm2 photodiodes in 20μm thick intrinsic EPI on highly p-doped substrates we achieved responsivities of 0.57A/W at λ=675nm, capacitances of 0.066pF and dark currents of 0.8pA at 2V reverse voltage.

Paper Details

Date Published: 11 May 2012
PDF: 9 pages
Proc. SPIE 8431, Silicon Photonics and Photonic Integrated Circuits III, 843115 (11 May 2012); doi: 10.1117/12.922268
Show Author Affiliations
I. Jonak-Auer, austriamicrosystems AG (Austria)
J. Teva, austriamicrosystems AG (Austria)
J. M. Park, austriamicrosystems AG (Austria)
S. Jessenig, austriamicrosystems AG (Austria)
M. Rohrbacher, austriamicrosystems AG (Austria)
E. Wachmann, austriamicrosystems AG (Austria)

Published in SPIE Proceedings Vol. 8431:
Silicon Photonics and Photonic Integrated Circuits III
Laurent Vivien; Seppo K. Honkanen; Lorenzo Pavesi; Stefano Pelli, Editor(s)

© SPIE. Terms of Use
Back to Top