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Proceedings Paper

Optimization of high speed pipelining in FPGA-based FIR filter design using genetic algorithm
Author(s): Uwe Meyer-Baese; Guillermo Botella; David E. T. Romero; Martin Kumm
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Paper Abstract

This paper compares FPGA-based full pipelined multiplierless FIR filter design options. Comparison of Distributed Arithmetic (DA), Common Sub-Expression (CSE) sharing and n-dimensional Reduced Adder Graph (RAG-n) multiplierless filter design methods in term of size, speed, and A*T product are provided. Since DA designs are table-based and CSE/RAG-n designs are adder-based, FPGA synthesis design data are used for a realistic comparison. Superior results of a genetic algorithm based optimization of pipeline registers and non-output fundamental coefficients are shown. FIR filters (posted as open source by Kastner et al.) for filters in the length from 6 to 151 coefficients are used.

Paper Details

Date Published: 10 May 2012
PDF: 12 pages
Proc. SPIE 8401, Independent Component Analyses, Compressive Sampling, Wavelets, Neural Net, Biosystems, and Nanoengineering X, 84010R (10 May 2012); doi: 10.1117/12.918934
Show Author Affiliations
Uwe Meyer-Baese, Florida State Univ. (United States)
Guillermo Botella, Florida State Univ. (United States)
David E. T. Romero, Florida State Univ. (United States)
Martin Kumm, Univ. of Kassel (Germany)


Published in SPIE Proceedings Vol. 8401:
Independent Component Analyses, Compressive Sampling, Wavelets, Neural Net, Biosystems, and Nanoengineering X
Harold Szu, Editor(s)

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