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Proceedings Paper

Computational process optimization of array edges
Author(s): Bernd Küchler; Artem Shamsuarov; Thomas Mülders; Ulrich Klostermann; Seung-Hune Yang; Seongho Moon; Vitaliy Domnenko; Sung-Woon Park
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Paper Abstract

DRAM chip space is mainly determined by the size of the memory cell array patterns which consist of periodic memory cell features. Resolution Enhancement Techniques are used to optimize the periodic pattern process performance. This is often realized with aggressively coherent illumination sources supporting the periodic pattern pitch only and making an array edge correction very difficult. The edge can be the most critical pattern since it forms the transition from periodic patterns to non periodic periphery, so it combines the most critical pitch and highest susceptibility to defocus. Non functional dummy structures are very effective to support the outermost edge but are very expensive, so their reduction or avoidance directly increases chip space efficiency. This paper focuses on how to optimize the DRAM array edge automatically in contrast to manual optimization approaches that were used effectively but at high cost. We will show how to squeeze out the masks degrees of freedom to stay within tight pattern tolerances. In that way we minimize process variations and the need of costly non-functional dummy structures. To obtain the best possible results the optimization has to account for complex boundary conditions: correct resist effect prediction, mask manufacturability constraints, low dose, low MEEF, conservation of symmetries and SRAF printing, simultaneous optimization of main features and SRAFs. By incorporating these complex boundary conditions during optimization we aim to provide first time right layouts without the need for any post processing.

Paper Details

Date Published: 13 March 2012
PDF: 9 pages
Proc. SPIE 8326, Optical Microlithography XXV, 83260H (13 March 2012); doi: 10.1117/12.916528
Show Author Affiliations
Bernd Küchler, Synopsys GmbH (Germany)
Artem Shamsuarov, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Thomas Mülders, Synopsys GmbH (Germany)
Ulrich Klostermann, Synopsys GmbH (Germany)
Seung-Hune Yang, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Seongho Moon, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Vitaliy Domnenko, Synopsys (Russian Federation)
Sung-Woon Park, Synopsys (Korea, Republic of)

Published in SPIE Proceedings Vol. 8326:
Optical Microlithography XXV
Will Conley, Editor(s)

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