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Proceedings Paper

Methodology for establishing CD-SEM robust metrology algorithm for development cycles applications
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Paper Abstract

ArF lithography is still the main technology in the most advanced processes of semiconductor fabrication. Being able to reliably measure and characterize these lithographic processes in-depth is becoming more and more critical. Critical Dimension-Scanning Electron Microscope (CD-SEM) continues to be the work horse tool for both in-line critical dimension (CD) metrology and characterization of ArF photoresist pattern. CD shrink of ArF photoresist has been one of the major challenges for CD-SEM metrology, and it becomes more difficult to measure shrinkage accurately for smaller feature size than ~50nm. The authors have developed a new measurement technique of photoresist shrinkage which measures CD difference between shrunk and non-shrunk sites after etching. There are many imaging and image processing parameters in CD-SEM which need to be optimized to obtain small shrinkage and good precision. There is a trade-off relationship between shrinkage and precision, and a comprehensive and systematic methodology is required for optimization of parameters. The authors have developed an optimization method that uses Taguchi method, where only 18 experiments are required. We can predict shrinkage, precision and relative CD offset for any combination of measurement parameter settings used in the 18 experiments by Taguchi method, and these predicted data can be used for optimization. A new concept of secondary reference metrology is also introduced in this paper to reduce the number of measurement by a reference metrology tool.

Paper Details

Date Published: 5 April 2012
PDF: 8 pages
Proc. SPIE 8324, Metrology, Inspection, and Process Control for Microlithography XXVI, 83241G (5 April 2012); doi: 10.1117/12.916492
Show Author Affiliations
Keiichiro Hitomi, Hitachi America, Ltd. (United States)
Erin Lavigne, IBM Systems and Technology Group (United States)
Shoji Hotta, Hitachi America, Ltd. (United States)
Yoshinori Momonoi, Hitachi, Ltd. (Japan)
Matthew Colburn, IBM Research Div. (United States)
Atsuko Yamaguchi, Hitachi, Ltd. (Japan)
Katsuhiro Sasada, Hitachi High-Technologies Corp. (Japan)
Tatsuya Maeda, Hitachi High-Technologies Corp. (Japan)


Published in SPIE Proceedings Vol. 8324:
Metrology, Inspection, and Process Control for Microlithography XXVI
Alexander Starikov, Editor(s)

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