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Proceedings Paper

Comparison of directed self-assembly integrations
Author(s): Mark Somervell; Roel Gronheid; Joshua Hooge; Kathleen Nafus; Paulina Rincon Delgadillo; Chris Thode; Todd Younkin; Koichi Matsunaga; Ben Rathsack; Steven Scheer; Paul Nealey
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Paper Abstract

Directed Self-Assembly (DSA) is gaining momentum as a means for extending optical lithography past its current limits. There are many forms of the technology, and it can be used for creating both line/space and hole patterns.1-3 As with any new technology, adoption of DSA faces several key challenges. These include creation of a new materials infrastructure, fabrication of new processing hardware, and the development of implementable integrations. Above all else, determining the lowest possible defect density remains the industry's most critical concern. Over the past year, our team, working at IMEC, has explored various integrations for making 12-14nm half-pitch line/space arrays. Both grapho- and chemo-epitaxy implementations have been investigated in order to discern which offers the best path to high volume manufacturing. This paper will discuss the manufacturing readiness of the various implementations by comparing the process margin for different DSA processing steps and defect density for the entirety of the flow. As part of this work, we will describe our method for using programmed defectivity on reticle to elucidate the mechanisms that drive self-assembly defectivity on wafer.

Paper Details

Date Published: 14 March 2012
PDF: 14 pages
Proc. SPIE 8325, Advances in Resist Materials and Processing Technology XXIX, 83250G (14 March 2012); doi: 10.1117/12.916406
Show Author Affiliations
Mark Somervell, Tokyo Electron America, Inc. (United States)
Roel Gronheid, IMEC (Belgium)
Joshua Hooge, Tokyo Electron America, Inc. (United States)
Kathleen Nafus, Tokyo Electron America, Inc. (United States)
Paulina Rincon Delgadillo, Univ. of Wisconsin-Madison (United States)
Chris Thode, Univ. of Wisconsin-Madison (United States)
Todd Younkin, Intel Corp. (Belgium)
Koichi Matsunaga, Tokyo Electron Kyushu Ltd. (Japan)
Ben Rathsack, Tokyo Electron America, Inc. (United States)
Steven Scheer, Tokyo Electron America, Inc. (United States)
Paul Nealey, Univ. of Wisconsin-Madison (United States)


Published in SPIE Proceedings Vol. 8325:
Advances in Resist Materials and Processing Technology XXIX
Mark H. Somervell; Thomas I. Wallow, Editor(s)

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