Share Email Print
cover

Proceedings Paper

Advanced full-automatic inspection of copper interconnects
Author(s): S. Takada; N. Ban; T. Ishimoto; N. Suzuki; S. Umehara; L. Carbonell; N. Heylen; R. Caluwaerts; H. Volders; K. Kellens; Z. Tokei
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

The early detection of Cu sub-surface voids in nano-interconnects has become a main challenge with the reduction of the critical dimensions of the interconnects. A new methodology for full wafer Cu void inspection with high sensitivity and high speed has been developed using a Multi-Purpose SEM (MP-SEM) using high accelerating voltage, high resolution and multi BSE detectors. This inspection methodology has been used to evaluate the Cu metallization quality in nanointerconnects. The effectiveness of this inspection methodology was proven through the evidence of relations between Cu void density, trench widths, pattern density, and surrounding dummy structures.

Paper Details

Date Published: 5 April 2012
PDF: 6 pages
Proc. SPIE 8324, Metrology, Inspection, and Process Control for Microlithography XXVI, 83242R (5 April 2012); doi: 10.1117/12.916254
Show Author Affiliations
S. Takada, Hitachi High-Technologies Corp. (Japan)
N. Ban, Hitachi High-Technologies Corp. (Japan)
T. Ishimoto, Hitachi High-Technologies Corp. (Japan)
N. Suzuki, Hitachi High-Technologies Corp. (Japan)
S. Umehara, Hitachi High-Technologies Corp. (Japan)
L. Carbonell, IMEC (Belgium)
N. Heylen, IMEC (Belgium)
R. Caluwaerts, IMEC (Belgium)
H. Volders, IMEC (Belgium)
K. Kellens, IMEC (Belgium)
Z. Tokei, IMEC (Belgium)


Published in SPIE Proceedings Vol. 8324:
Metrology, Inspection, and Process Control for Microlithography XXVI
Alexander Starikov, Editor(s)

© SPIE. Terms of Use
Back to Top