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Proceedings Paper

In-design process hotspot repair using pattern matching
Author(s): Daehyun Jang; Naya Ha; Junsu Jeon; Jae-Hyun Kang; Seung Weon Paek; Hungbok Choi; Kee Sup Kim; Ya-Chieh Lai; Philippe Hurat; Wilbur Luo
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Paper Abstract

As patterning for advanced processes becomes more challenging, designs must become more process-aware. The conventional approach of running lithography simulation on designs to detect process hotspots is prohibitive in terms of runtime for designers, and also requires the release of highly confidential process information. Therefore, a more practical approach is required to make the In-Design process-aware methodology more affordable in terms of maintenance, confidentiality, and runtime. In this study, a pattern-based approach is chosen for Process Hotspot Repair (PHR) because it accurately captures the manufacturability challenges without releasing sensitive process information. Moreover, the pattern-based approach is fast and well integrated in the design flow. Further, this type of approach is very easy to maintain and extend. Once a new process weak pattern has been discovered (caused by Chemical Mechanical Polishing (CMP), etch, lithography, and other process steps), the pattern library can be quickly and easily updated and released to check and fix subsequent designs. This paper presents the pattern matching flow and discusses its advantages. It explains how a pattern library is created from the process weak patterns found on silicon wafers. The paper also discusses the PHR flow that fixes process hotspots in a design, specifically through the use of pattern matching and routing repair.

Paper Details

Date Published: 15 March 2012
PDF: 8 pages
Proc. SPIE 8327, Design for Manufacturability through Design-Process Integration VI, 83270S (15 March 2012); doi: 10.1117/12.916199
Show Author Affiliations
Daehyun Jang, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Naya Ha, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Junsu Jeon, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jae-Hyun Kang, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Seung Weon Paek, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Hungbok Choi, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Kee Sup Kim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Ya-Chieh Lai, Cadence Design Systems, Inc. (United States)
Philippe Hurat, Cadence Design Systems, Inc. (United States)
Wilbur Luo, Cadence Design Systems, Inc. (United States)


Published in SPIE Proceedings Vol. 8327:
Design for Manufacturability through Design-Process Integration VI
Mark E. Mason, Editor(s)

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