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Characteristics analysis of RELACS process from an OPC point of view
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Paper Abstract

There are strong demands for techniques which are able to extend application of ArF immersion lithography. Especially, the leading edge techniques are required to make very small hole patterns below 50nm. Several techniques such as double patterning technique, free-form illumination and resist shrinkage technology are considered as viable candidates. Most of all, NTD (Negative Tone Development) is being regarded as the most promising technology for the realization of small hole patterns When NTD process is applied, hole patterns are defined by island type features on the reticle and consequently its optical performance shows better result compared with PTD (Positive Tone Development) process. However it is still difficult to define extremely small hole patterns below 40nm, new combination process of NTD with RELACS is being introduced to overcome resolution limitation. NTD combined with RELACS, which is the most advanced lithography technology, definitely enable us to generate smaller size hole patterns on the wafer. A chemical shrinkage technology, RELACS (Resolution Enhancement Lithography Assisted by Chemical Shrink), utilizes the cross linking reaction catalyzed by the acid component existing in a predefined resist pattern. In case of PTD combined with RELACS process, we already know that CD change after the shrinkage process is not influenced by duty ratio. So we could easily reflect the RELACS bias to meet the CD target during OPC (Optical Proximity Correction) procedure. But NTD combined with RELACS process was not understood clearly, nor verified. It requires more investigation of physical behavior during combined process in order to define exact hole patterns. The newly introduced process might require additive OPC modeling procedure to satisfy target CD when NTD RELACS bias has different values according to pitch and shape. This study is going to include the investigation on two types of resist shrinkage process, PTD and NTD. The optimized OPC methodology will be discussed through the evaluation on simple array hole patterns and random hole patterns.

Paper Details

Date Published: 20 March 2012
PDF: 8 pages
Proc. SPIE 8325, Advances in Resist Materials and Processing Technology XXIX, 83251Z (20 March 2012); doi: 10.1117/12.916121
Show Author Affiliations
Jinyoung Choi, Hynix Semiconductor Inc. (Korea, Republic of)
Minae Yoo, Hynix Semiconductor Inc. (Korea, Republic of)
Chanha Park, Hynix Semiconductor Inc. (Korea, Republic of)
Changil Oh, Hynix Semiconductor Inc. (Korea, Republic of)
Cheolkyun Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Hyunjo Yang, Hynix Semiconductor Inc. (Korea, Republic of)
Donggyu Yim, Hynix Semiconductor Inc. (Korea, Republic of)

Published in SPIE Proceedings Vol. 8325:
Advances in Resist Materials and Processing Technology XXIX
Mark H. Somervell; Thomas I. Wallow, Editor(s)

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