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Proceedings Paper

Challenges for 1x nm-device fabrication using EUVL: scanner and mask
Author(s): William H. Arnold
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Paper Abstract

EUVL lithography using high resolution step and scan systems operating at 13.5nm is being inserted in leading edge production lines for memory and logic devices. These tools use mirror optics and either laser produced plasma (LPP) or discharge produced plasma (DPP) sources along with reflective reduction masks to image circuit features. These tools show their capability to meet the challenging device requirements for imaging and overlay. Next generation scanners with resolution and overlay capability to produce 1X nm (10 nm class) memory and logic devices are in preparation. Challenges remain for EUVL, the principal of which are increasing source power enabling high productivity, building a volume mask business encouraging rapid learning cycles, and improving resist performance so it is capable of sub 20nm resolution.

Paper Details

Date Published: 13 October 2011
PDF: 9 pages
Proc. SPIE 8166, Photomask Technology 2011, 81662I (13 October 2011); doi: 10.1117/12.901602
Show Author Affiliations
William H. Arnold, ASML Technology Development Ctr. (United States)

Published in SPIE Proceedings Vol. 8166:
Photomask Technology 2011
Wilhelm Maurer; Frank E. Abboud, Editor(s)

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