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Proceedings Paper

DOE experiment for scattering bars optimization at the 90nm node
Author(s): G. Bouton; B. Connolly; D. Courboin; A. Di Giacomo; F. Gasnier; R. Lallement; D. Parker; M. Pindo; J. C. Richoilley; F. Royere; A. Rameau-Savio; M. Tissier
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Paper Abstract

Scattering bars (SB) are sub-resolution lines added to the original database during Resolution Enhancement Techniques (RET) treatments. Their goal is stabilizing the CD of the adjacent polygons (by suppressing or reducing secondary diffraction waves). SB increase the process window in the litho process by lowering the first derivative of the CD. Moreover, the detailed knowledge of SB behavior around the fab working point is a must for future shrinks and for preparing the next technology nodes. SB are inserted in the generation of critical levels for STMicroelectronics 90 nm technology embedded memories before invoking the Model for Optical Proximity Corrections (MBOPC). This allows the software to calculate their contribution to the intensity in the aerial image and integrate their effects in Edge Proximity Error (EPE) corrections. However the Rule-Based insertion of these assist features still leaves behind occurrences of conflicting priorities as in the image below. (See manuscript PDF)Detection of Hot Spots in 2D simulations for die treatment validation (done on BRION equipment on each critical level before mask making) is in most cases correlated with SB singularities, at least for CD non-uniformity, bridging issues and necking in correspondence with OPC fragmentation effects. Within the framework of the MaXSSIMM project, we established a joint STMicroelectronics and Toppan Photomasks team to explore the influence of assist features (CD, distance), convex and concave corner rounding and CD uniformity by means of specific test patterns. The proposed study concerns the algorithms used to define the mask shop input as well as the physical mask etching. A set of test cases, based on elementary test patterns, each one including a list of geometrical variations, has been defined. As the number of configurations becomes rapidly very large (tens of thousands) we had to apply Design of Experiments (DOE) algorithms in order to reduce the number of measurements to a reasonable range (a few hundred). The proposed test cells have been inserted in the scribe lanes of an engineering Gate mask of one of STMicroelectronics' high volume products. Real Hot Spots, detected in the product chosen as the test vehicle, have also been submitted to the same variations and inserted in scribe blocks. In parallel with OPC-like scribe layouts, four best-guess treatments were applied, on the same critical mask, to assess transistor performance and yield impact by standard wafer splitting on engineering lots. The advanced binary 4×6" reticle for 193nm exposure has been manufactured by Toppan Photomasks in the AMTC facility in Dresden using the standard production process on the NuFlare5000 e-beam writing platform. The exploration of the parameter space around the current working point will determine if the current process settings already represent an optimum or if there is room for significant improvement of the wafer manufacturing process.

Paper Details

Date Published: 2 April 2011
PDF: 14 pages
Proc. SPIE 7985, 27th European Mask and Lithography Conference, 79850R (2 April 2011); doi: 10.1117/12.896341
Show Author Affiliations
G. Bouton, STMicroelectronics (France)
B. Connolly, Toppan Photomasks, Inc. (Germany)
D. Courboin, Toppan Photomasks, Inc. (France)
A. Di Giacomo, STMicroelectronics (France)
F. Gasnier, STMicroelectronics (France)
R. Lallement, STMicroelectronics (France)
D. Parker, STMicroelectronics (France)
M. Pindo, Toppan Photomasks, Inc. (France)
J. C. Richoilley, Toppan Photomasks, Inc. (France)
F. Royere, Toppan Photomasks, Inc. (France)
A. Rameau-Savio, Elsys Design (France)
M. Tissier, Toppan Photomasks, Inc. (France)


Published in SPIE Proceedings Vol. 7985:
27th European Mask and Lithography Conference
Uwe F.W. Behringer, Editor(s)

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