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Proceedings Paper

Rapid defect detections of bonded wafer using near infrared polariscope
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Paper Abstract

In modern field of microelectronics and MEMS, wafer bonding has emerged as an important processing step in wide range of manufacturing applications. During the manufacturing process, even in the modern clean room, small defects result from trapped particles and gas bubbles exist at bonded interface. Defects and trapped particles may exist on the top and bottom of the wafers, or at the interface of bonded wafer pair. These inclusions will generate high stress around debond region at the wafers bonded interface. In this paper, inspection at the bonded interface will be the interest of investigation. Since silicon wafer is opaque to visible light, defect detection at the bonded interface of silicon wafer is not possible. Due to the fact that silicon wafer is transparent to wavelength greater than 1150nm, an Near Infrared Polariscope which has showed some promises on residual stress measurement on silicon devices has been adapted and developed. This method is based on the well known photoelastic principles, where the stress variations are measured based on the changes of light propagation velocity in birefringence material. The results are compared and contrast with conventional Infrared Transmission Imaging tool (IRT) which is widely used to inspect the bonded silicon wafer. In this research, the trapped particles that are not visible via conventional infrared transmission method are identified via the generated residual stress pattern. The magnitude of the residual stress fields associated with each defect is examined qualitatively and quantitatively. The stress field generated at the wafers bonded interface will looks like a 'butterfly' pattern. Wafer pairs Pyrex-Si and Si-Si bonded interface will be examined.

Paper Details

Date Published: 20 September 2011
PDF: 11 pages
Proc. SPIE 8105, Instrumentation, Metrology, and Standards for Nanomanufacturing, Optics, and Semiconductors V, 81050P (20 September 2011); doi: 10.1117/12.894402
Show Author Affiliations
Chi Seng Ng, Nanyang Technological Univ. (Singapore)
Infineon Technologies (Singapore)
Anand K. Asundi, Nanyang Technological Univ. (Singapore)


Published in SPIE Proceedings Vol. 8105:
Instrumentation, Metrology, and Standards for Nanomanufacturing, Optics, and Semiconductors V
Michael T. Postek, Editor(s)

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