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Proceedings Paper

A hardware implementation of nonlinear correlation filters
Author(s): Saúl Martínez-Díaz; Hugo Castañeda-Girón
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Paper Abstract

Recently, nonlinear correlation filters have been proposed for distortion-invariant pattern recognition. The design of the filters is based on rank-order, logical operations and nonlinear correlation. These kinds of filters are robust to non Gaussian noise and non-homogeneous illumination. A drawback of nonlinear filters is its high computational cost; however, the computation of nonlinear correlation can be parallelized. In this paper a hardware implementation of nonlinear filtering is presented. The hardware coprocessor is based on a Field Programmable Gate Array (FPGA) device. Simulation results are provided and discussed.

Paper Details

Date Published: 24 September 2011
PDF: 7 pages
Proc. SPIE 8135, Applications of Digital Image Processing XXXIV, 81351D (24 September 2011); doi: 10.1117/12.892433
Show Author Affiliations
Saúl Martínez-Díaz, Instituto Tecnológico de La Paz (Mexico)
Hugo Castañeda-Girón, Instituto Tecnológico de La Paz (Mexico)


Published in SPIE Proceedings Vol. 8135:
Applications of Digital Image Processing XXXIV
Andrew G. Tescher, Editor(s)

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