Share Email Print
cover

Proceedings Paper

Critical challenges for non-critical layers
Author(s): J. M. Gomez; I. Y. Popova; B. Zhang; H. Kry; S. J. Holmes; S. Nakagawa; T. Murakami; Chan Sam Chang; Cheol Kim
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Historically, the block layers are considered "non critical ", as ones requiring less challenging ground rules. However, continuous technology-driven scaling has brought these layers to a point, where resolution, tolerance and aspect ratio issue of block masks now present significant process and material challenges. Some of these challenges will be discussed in this paper. In recent bulk technology nodes, the deep well implants require an aspect ratio of up to 5:1 in conventional resist leading to small process margin for line collapse and/or residue. New integration schemes need to be devised to alleviate these issues, i.e. scaling down the energy of the implant and the STI deep trench to reduce resist thickness, or new hard mask solutions with high stopping power to be dry etched. Underlying topography creates severe substrate reflectivity issues that affect CD, tolerance, profiles and defectivity. In addition to the CD offset due to the substrate, the implant process induces CD shrinkage and resists profile degradation that affects the devices. Minimizing these effects is paramount for controlling implant level processes and meeting overall technology requirements. These "non-critical" layers will require the development of more complex processes and integration schemes to be able to support the future technology nodes. We will characterize these process constraints, and propose some process / integration solutions for scaling down from 28nm to 20 nm technology node.

Paper Details

Date Published: 15 April 2011
PDF: 9 pages
Proc. SPIE 7972, Advances in Resist Materials and Processing Technology XXVIII, 79722T (15 April 2011); doi: 10.1117/12.879866
Show Author Affiliations
J. M. Gomez, IBM Corp. (United States)
I. Y. Popova, IBM Corp. (United States)
B. Zhang, IBM Corp. (United States)
H. Kry, IBM Corp. (United States)
S. J. Holmes, IBM Thomas J. Watson Research Ctr. (United States)
S. Nakagawa, Toshiba America Electronic Components Inc. (United States)
T. Murakami, Renesas Electronics Corp. (United States)
Chan Sam Chang, SAMSUNG Electronics Co., Ltd. (United States)
Cheol Kim, SAMSUNG Electronics Co., Ltd. (United States)


Published in SPIE Proceedings Vol. 7972:
Advances in Resist Materials and Processing Technology XXVIII
Robert D. Allen; Mark H. Somervell, Editor(s)

© SPIE. Terms of Use
Back to Top