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Proceedings Paper

Towards manufacturing of advanced logic devices by double-patterning
Author(s): Chiew-seng Koay; Scott Halle; Steven Holmes; Karen Petrillo; Matthew Colburn; Youri van Dommelen; Aiqin Jiang; Michael Crouse; Shannon Dunn; David Hetzer; Shinichiro Kawakami; Jason Cantone; Lior Huli; Martin Rodgers; Brian Martinick
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Paper Abstract

As reported previously, the IBM Alliance has established a DETO (Double-Expose-Track-Optimized) baseline, in collaboration with ASML, TEL, and CNSE, to evaluate commercially available DETO photoresist system for the manufacturing of advanced logic devices. Although EUV lithography is the baseline strategy for <2x nm logic nodes, alternative techniques are still being pursued. The DETO technique produces pitch-split patterns capable of supporting 16 nm and 11 nm node semiconductor devices. We present the long-term monitoring performances of CD uniformity (CDU), overlay, and defectivity of our DETO process. CDU and overlay performances for controlled experiments are also presented. Two alignment schemes in DETO are compared experimentally for their effects on inter-level & intralevel overlays, and space CDU. We also experimented with methods for improving CDU, in which the CD-OptimizerTMand DoseMapperTM were evaluated separately and in tandem. Overlay improvements using the Correction Per Exposure (CPE) and the intra-field High-Order Process Correction (i-HOPC) were compared against the usual linear correction method. The effects of the exposure field size are also compared between a small field and the full field. Included in all the above, we also compare the performances derived from stack-integrated wafers and bare-Si wafers.

Paper Details

Date Published: 22 March 2011
PDF: 18 pages
Proc. SPIE 7973, Optical Microlithography XXIV, 79730F (22 March 2011); doi: 10.1117/12.879618
Show Author Affiliations
Chiew-seng Koay, IBM Corp. (United States)
Scott Halle, IBM Corp. (United States)
Steven Holmes, IBM Corp. (United States)
Karen Petrillo, IBM Corp. (United States)
Matthew Colburn, IBM Corp. (United States)
Youri van Dommelen, ASML (United States)
Aiqin Jiang, ASML (United States)
Michael Crouse, ASML (United States)
Shannon Dunn, Tokyo Electron America, Inc. (United States)
David Hetzer, Tokyo Electron Technology Ctr., America, LLC (United States)
Shinichiro Kawakami, Tokyo Electron Technology Ctr., America, LLC (United States)
Jason Cantone, Tokyo Electron America, Inc. (United States)
Lior Huli, Univ. at Albany (United States)
Martin Rodgers, Univ. at Albany (United States)
Brian Martinick, Univ. at Albany (United States)

Published in SPIE Proceedings Vol. 7973:
Optical Microlithography XXIV
Mircea V. Dusa, Editor(s)

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