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Proceedings Paper

The resist-core spacer patterning process for fabrication of 2xnm node semiconductor devices
Author(s): Koutarou Sho; Tomoya Oori; Kazunori Iida; Katsutoshi Kobayashi; Keisuke Kikutani; Katsumi Yamamoto; Fumiki Aiso; Kentaro Matsunaga; Eishi Shiobara; Koji Hashimoto
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Paper Abstract

The spacer patterning process is one of the strongest double patterning technology candidates for fabricating 2xnm node semiconductor devices by ultra-low-k1 lithography. However, a severe problem exists with this process, it has an excessive number of steps, including resist patterning, core film etching, spacer film deposition, spacer film etchback, core film removal, and hard mask patterning steps. We devised a simpler process in which a resist pattern is directly used as the core film pattern and the spacer film is a low-temperature-deposited oxide film that can be fabricated around the resist pattern without damaging the resist material. Thus, this new process, which we call "resist-core" spacer patterning, has significantly fewer patterning steps. When we used the new process to fabricate 2xnm node semiconductor devices with an ArF immersion scanner, two key issues arose. The first issue regarding the controllability of the resist pattern profile, which can directly affect the spacer film pattern profile, was addressed by applying various resist patterning conditions such as resist materials, illumination conditions, and bottom anti-reflecting materials. The second issue, regarding the resist slimming method was addressed by evaluating two alternative techniques, wet slimming and dry slimming.

Paper Details

Date Published: 15 April 2011
PDF: 11 pages
Proc. SPIE 7972, Advances in Resist Materials and Processing Technology XXVIII, 79720C (15 April 2011); doi: 10.1117/12.877616
Show Author Affiliations
Koutarou Sho, Toshiba Corp. (Japan)
Tomoya Oori, Toshiba Corp. (Japan)
Kazunori Iida, Toshiba Corp. (Japan)
Katsutoshi Kobayashi, Toshiba Corp. (Japan)
Keisuke Kikutani, Toshiba Corp. (Japan)
Katsumi Yamamoto, Toshiba Corp. (Japan)
Fumiki Aiso, Toshiba Corp. (Japan)
Kentaro Matsunaga, Toshiba Corp. (Japan)
Eishi Shiobara, Toshiba Corp. (Japan)
Koji Hashimoto, Toshiba Corp. (Japan)

Published in SPIE Proceedings Vol. 7972:
Advances in Resist Materials and Processing Technology XXVIII
Robert D. Allen; Mark H. Somervell, Editor(s)

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