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Proceedings Paper

Low-energy silicon-on-insulator ion implanted gratings for optical wafer scale testing
Author(s): Renzo Loiacono; Graham T. Reed; Goran Z. Mashanovich; Russell M. Gwilliam; Giorgio Lulli; Ran Feldesh; Richard Jones
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Paper Abstract

Silicon photonics shows tremendous potential for the development of the next generation of ultra fast telecommunication, tera-scale computing, and integrated sensing applications. One of the challenges that must be addressed when integrating a "photonic layer" onto a silicon microelectronic circuit is the development of a wafer scale optical testing technique, similar to that employed today in integrated electronics industrial manufacturing. This represents a critical step for the advancement of silicon photonics to large scale production technology with reduced costs. In this work we propose the fabrication and testing of ion implanted gratings in sub micrometer SOI waveguides, which could be applied to the implementation of optical wafer scale testing strategies. An extinction ratio of over 25dB has been demonstrated for ion implanted Bragg gratings fabricated by low energy implants in submicron SOI rib waveguides with lengths up to 1mm. Furthermore, the possibility of employing the proposed implanted gratings for an optical wafer scale testing scheme is discussed in this work.

Paper Details

Date Published: 17 January 2011
PDF: 6 pages
Proc. SPIE 7943, Silicon Photonics VI, 794310 (17 January 2011); doi: 10.1117/12.873288
Show Author Affiliations
Renzo Loiacono, Univ. of Surrey (United Kingdom)
Graham T. Reed, Univ. of Surrey (United Kingdom)
Goran Z. Mashanovich, Univ. of Surrey (United Kingdom)
Russell M. Gwilliam, Univ. of Surrey (United Kingdom)
Giorgio Lulli, Istituto per la Microelettronica ed i Microsistemi (Italy)
Ran Feldesh, Numonyx Memory Solutions (Israel)
Richard Jones, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 7943:
Silicon Photonics VI
Joel A. Kubby; Graham T. Reed, Editor(s)

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