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Proceedings Paper

Influence of massively parallel e-beam direct-write pixel size on electron proximity correction
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Paper Abstract

Massively E-beam maskless lithography (MEBML2) is one of the potential solutions for 32-nm half-pitch and beyond. In the past, its relatively low throughput restricted EBDW development to mostly mask making, small volume wafer production and prototyping. Recently the production worthy ML2 approaches, >10,000 e-beams writing in parallel, have been proposed by MAPPER, KLA and IMS. These approaches use raster scan in pattern writing. Hence the bitmap is certainly the final data format. The bitmap format used to have huge data volume with fine pixel size to maintain the CD accuracy after electron proximity correction (EPC). Data handling becomes necessary, especially on data transmission rate. The aggregated data transmission rate would be up to 1963 Tera bits per second (bps) for a 10 WPH tool using 1-nm pixel size and 1-bit gray level. It needs 19,630 fibers each transmitting 10 Gbps. The data rate per beam would be >20 Gbps in 10,000-beam MEBML2. Hence data reduction using bigger pixel size to achieve sub-nm EPC accuracy is crucial for reducing the fiber number to the beam number. In this paper, the writing-error-enhanced-factor to quantitatively characterize the impact of CD accuracy by various total blur in resist is reported; and we propose the vernier pattern to verify sub-nm CD accuracy and the in-house dithering raster method to achieve sub-0.2-nm CD accuracy using multiple-nm pixel sizes, which could reduce the need of the aggregated data rate to 11%, 33%, 44% and 79% of 1963 Tbps on 22-nm, 16-nm, 11-nm, 8-nm node respectively.

Paper Details

Date Published: 4 April 2011
PDF: 8 pages
Proc. SPIE 7970, Alternative Lithographic Technologies III, 79700Z (4 April 2011); doi: 10.1117/12.869896
Show Author Affiliations
S. J. Lin, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
P. S. Chen, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
J. J. Shin, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
W. C. Wang, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
Burn J. Lin, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 7970:
Alternative Lithographic Technologies III
Daniel J. C. Herr, Editor(s)

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