Share Email Print
cover

Proceedings Paper

Study on counting error in particle inspection
Author(s): Mitsuaki Amemiya; Kazuya Ota; Takao Taguchi; Osamu Suga
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

In EUV lithography (EUVL) it is important to protect a mask from the adhesion of particles because it is difficult to use a pellicle. At Selete, we evaluated a dual-pod carrier and reported on its ability to protect a mask from particles. In the evaluation the average number of particles added to the mask during several hundred handling-cycles was 0.4. Therefore, it is very important to precisely count the number of particle adders. However, according to the specification of the inspection tool, the counting error was greater than the average number of particle adders in the evaluation. In addition, it is known that the error increases for particles with a size near the detection limit. In the evaluation, we inspected a mask substrate four times and regarded signals detected multiple times as real particles. We studied the counting error by assuming that the detection probability followed a static statistical fluctuation. We found that the expected value of counting error was represented with the equation by the number of initial particles, particle adders, capture rate, and inspection times. Under our evaluation condition, even if no quasi-particles existed, the counting error by a single inspection was estimated to be approximately 4. However, the counting error by our evaluation (four inspections) was estimated to be approximately 0.05. Therefore, we found that the reliability by multiple inspections was much higher than that by a single inspection and that the number of particles near the detection limit could be found precisely by multiple inspections. * This work was supported by NEDO.

Paper Details

Date Published: 26 May 2010
PDF: 9 pages
Proc. SPIE 7748, Photomask and Next-Generation Lithography Mask Technology XVII, 77481B (26 May 2010); doi: 10.1117/12.867929
Show Author Affiliations
Mitsuaki Amemiya, Semiconductor Leading Edge Technologies, Inc. (Japan)
Kazuya Ota, Semiconductor Leading Edge Technologies, Inc. (Japan)
Takao Taguchi, Semiconductor Leading Edge Technologies, Inc. (Japan)
Osamu Suga, Semiconductor Leading Edge Technologies, Inc. (Japan)


Published in SPIE Proceedings Vol. 7748:
Photomask and Next-Generation Lithography Mask Technology XVII
Kunihiro Hosono, Editor(s)

© SPIE. Terms of Use
Back to Top