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Proceedings Paper

Challenges in flare correction in EUVL lithography for half pitch 22-nm generation
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Paper Abstract

We are focusing on the establishment of a flare correction technique for half pitch (HP) 22-nm generation in Extreme Ultra Violet Lithography (EUVL). However, there are some difficulties in the areas of flare calculation and edge biasing, associated with flare correction because of the tighter CD control requirements. In our previous work, we investigated the feasibility of an improved flare calculation and a new way of edge biasing. For the flare calculation, we adopted a short-range flare kernel method, which calculates short-range flare using a fine mesh only at the edges of patterns that require correction. From the simulation and experimental results of this method, we confirmed that it can calculate flare value accurately in a reasonable runtime. On the other hand, since the edge biasing has pattern dependency the work has to be customized accordingly, and that can lead to labor intensive task of pattern-dependent biasing. To address this problem, we began to explore the usefulness of model-based flare correction that has been improved where it can modulate the aerial image according to the flare effect during model-based OPC. For this work, we prepared a test mask containing line-and-space (L/S) patterns of several pitches with different flare levels. We then evaluated the accuracy of the model-based flare correction by simulating the corrected L/S patterns using a rigorous lithography simulation with 3-D mask stack structure. As a result, the CD error range was found to be from - 1.56 to 1.12 nm, which is within ±2 nm (±10 % of the minimum target CD). It is thus concluded that the model-based flare correction can deliver high accuracy results even where OPCs are also involved.

Paper Details

Date Published: 27 May 2010
PDF: 9 pages
Proc. SPIE 7748, Photomask and Next-Generation Lithography Mask Technology XVII, 774826 (27 May 2010); doi: 10.1117/12.867911
Show Author Affiliations
Taiga Uno, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yukiyasu Arisawa, Semiconductor Leading Edge Technologies, Inc. (Japan)
Hajime Aoyama, Semiconductor Leading Edge Technologies, Inc. (Japan)
Toshihiko Tanaka, Semiconductor Leading Edge Technologies, Inc. (Japan)


Published in SPIE Proceedings Vol. 7748:
Photomask and Next-Generation Lithography Mask Technology XVII
Kunihiro Hosono, Editor(s)

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