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Proceedings Paper

Compensating for image placement errors for the HP 3X nm node
Author(s): Eui Sang Park; Sang Pyo Kim; Tae Joong Ha; Chang Reol Kim
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Paper Abstract

As the feature size is smaller, the overlay budget of lithography for the rigorous manufacturing control becomes so small. And, overlay accuracy has become more important due to small overlap margin and double patterning process. Recently, a scanner maker has developed several effective solutions to correct the errors of overlay in field. But, the error induced by photomask still remains, so the accuracy of photomask image placement is required below than several nm for the HP 3X nm memory device generation. But, current e-beam writers don't meet this specification. There are various sources of image placement errors. Many papers report their analysis of those errors, so we focus on e-beam charging effect and compensation. Especially, their compensating methods are too complex to apply to production. So, it is need a simple way to compensate to image placement errors effectively.

Paper Details

Date Published: 26 May 2010
PDF: 7 pages
Proc. SPIE 7748, Photomask and Next-Generation Lithography Mask Technology XVII, 77481E (26 May 2010); doi: 10.1117/12.867721
Show Author Affiliations
Eui Sang Park, Hynix Semiconductor Inc. (Korea, Republic of)
Sang Pyo Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Tae Joong Ha, Hynix Semiconductor Inc. (Korea, Republic of)
Chang Reol Kim, Hynix Semiconductor Inc. (Korea, Republic of)


Published in SPIE Proceedings Vol. 7748:
Photomask and Next-Generation Lithography Mask Technology XVII
Kunihiro Hosono, Editor(s)

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