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Proceedings Paper

Monitor technology of outer circumstances for mask EB writing system
Author(s): H. Hoshi; N. Samoto; H. Manabe; O. Wakimoto; S. Iida; M. Yamabe
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Paper Abstract

The accuracies of image placement and line-width on masks become very serious with continued reduction of design rules in semiconductor device fabrication. Even a tiny deviation from the prescribed circumstances during a maskexposure process can result in severe damage to masks and require re-works, and result in increased mask manufacturing cost. In 2006, Mask Design, Drawing, and Inspection Technology Research Department (Mask D2I) at the Association of Super-Advanced Electronics Technologies (ASET), launched a 4-year development program for the optimization of mask design, drawing, and inspection to reduce the costs in photo-mask manufacturing. We have developed a self-diagnostic technology to monitor the process of data transfer and check the environmental condition during exposure to improve the reliability of the mask writer. The technology can improve the efficiency of mask inspection if the deviation points are known prior to the inspection. Our monitor and self-diagnostic system consists of a verification system for data processing, writing simulator, monitor for circumstances, and integrated diagnostic system. Each part in the monitor and self-diagnostic system monitors and diagnoses the status of data processing and circumstances. We evaluated the reliability of monitoring the outer circumstances using an actual mask writing tool. The details and results will be reported in this paper.

Paper Details

Date Published: 25 May 2010
PDF: 8 pages
Proc. SPIE 7748, Photomask and Next-Generation Lithography Mask Technology XVII, 774817 (25 May 2010); doi: 10.1117/12.864043
Show Author Affiliations
H. Hoshi, Association of Super-Advanced Electronics Technologies (Japan)
N. Samoto, Association of Super-Advanced Electronics Technologies (Japan)
H. Manabe, Association of Super-Advanced Electronics Technologies (Japan)
O. Wakimoto, Association of Super-Advanced Electronics Technologies (Japan)
S. Iida, Association of Super-Advanced Electronics Technologies (Japan)
M. Yamabe, Association of Super-Advanced Electronics Technologies (Japan)


Published in SPIE Proceedings Vol. 7748:
Photomask and Next-Generation Lithography Mask Technology XVII
Kunihiro Hosono, Editor(s)

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