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Proceedings Paper

Overview of the EU FP7-project HISTORIC
Author(s): G. Morthier; R Kumar; F. Raineri; R. Raj; Jens Hofrichter; Nikolaos Chrysos; B. J. Offrein; R. Zhang; J. van der Tol; O. Raz; H. Dorren
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Paper Abstract

HISTORIC aims to develop and test complex photonic integrated circuits containing a relatively large number of digital photonic elements for use in e.g. all-optical packet switching. These photonic digital units are alloptical flip-flops based on ultra compact laser diodes, such as microdisk lasers and photonic crystal lasers. These lasers are fabricated making use of the heterogeneous integration of InP membranes on top of silicon on insulator (SOI) passive optical circuits. The very small dimensions of the lasers are, at least for some approaches, possible because of the high index contrast of the InP membranes and by making use of the extreme accuracy of CMOS processing. All-optical flip-flops based on heterogeneously integrated microdisk lasers with diameter of 7.5μm have already been demonstrated. They operate with a CW power consumption of a few mW and can switch in 60ps with switching energies as low as 1.8 fJ. Their operation as all-optical gate has also been demonstrated. Work is also on-going to fabricate heterogeneously integrated photonic crystal lasers and all-optical flip-flops based on such lasers. A lot of attention is given to the electrical pumping of the membrane InP-based photonic crystal lasers and to the coupling to SOI wire waveguides. Optically pumped photonic crystal lasers coupled to SOI wires have been demonstrated already. The all-optical flip-flops and gates will be combined into more complex photonic integrated circuits, implementing all-optical shift registers, D flip-flops, and other all-optical switching building blocks. The possibility to integrate a large number of photonic digital units together, but also to integrate them with compact passive optical routers such as AWGs, opens new perspectives for the design of integrated optical processors or optical buffers. The project therefore also focuses on designing new architectures for such optical processing or buffer chips.

Paper Details

Date Published: 17 May 2010
PDF: 13 pages
Proc. SPIE 7719, Silicon Photonics and Photonic Integrated Circuits II, 771908 (17 May 2010); doi: 10.1117/12.855850
Show Author Affiliations
G. Morthier, Univ. Gent (Belgium)
R Kumar, Univ. Gent (Belgium)
F. Raineri, Lab. of Photonics and Nanostructures, CNRS (France)
R. Raj, Lab. of Photonics and Nanostructures, CNRS (France)
Jens Hofrichter, IBM Zürich Research GmbH (Switzerland)
Nikolaos Chrysos, IBM Zürich Research GmbH (Switzerland)
B. J. Offrein, IBM Zürich Research GmbH (Switzerland)
R. Zhang, Technische Univ. Eindhoven (Netherlands)
J. van der Tol, Technische Univ. Eindhoven (Netherlands)
O. Raz, Technische Univ. Eindhoven (Netherlands)
H. Dorren, Technische Univ. Eindhoven (Netherlands)


Published in SPIE Proceedings Vol. 7719:
Silicon Photonics and Photonic Integrated Circuits II
Giancarlo Cesare Righini, Editor(s)

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