Share Email Print
cover

Proceedings Paper

Demonstrating the benefits of template-based design-technology co-optimization
Author(s): Lars Liebmann; Jason Hibbeler; Nathaniel Hieter; Larry Pileggi; Tejas Jhaveri; Matthew Moe; Vyacheslav Rovner
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

The concept of template-based design-technology co-optimization as a means of curbing escalating design complexity and increasing technology qualification risk is described. Data is presented highlighting the design efficacy of this proposal in terms of power, performance, and area benefits, quantifying the specific contributions of complex logic gates in this design optimization. Experimental results from 32nm technology node bulk CMOS wafers are presented to quantify the variability and design-margin reductions as well as yield and manufacturability improvements achievable with the proposed template-based design-technology co-optimization technique. The paper closes with data showing the predictable composability of individual templates, demonstrating a fundamental requirement of this proposal.

Paper Details

Date Published: 2 April 2010
PDF: 8 pages
Proc. SPIE 7641, Design for Manufacturability through Design-Process Integration IV, 76410R (2 April 2010); doi: 10.1117/12.848244
Show Author Affiliations
Lars Liebmann, IBM Corp. (United States)
Jason Hibbeler, IBM Corp. (United States)
Nathaniel Hieter, IBM Corp. (United States)
Larry Pileggi, PDF Solutions, Inc. (United States)
Tejas Jhaveri, PDF Solutions, Inc. (United States)
Matthew Moe, PDF Solutions, Inc. (United States)
Vyacheslav Rovner, PDF Solutions, Inc. (United States)


Published in SPIE Proceedings Vol. 7641:
Design for Manufacturability through Design-Process Integration IV
Michael L. Rieger; Joerg Thiele, Editor(s)

© SPIE. Terms of Use
Back to Top