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Proceedings Paper

Toward perfect on-wafer pattern placement: stitched overlay exposure tool characterization
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Paper Abstract

Continued lithographic pattern density scaling depends on aggressive overlay error reduction.1,2 Double patterning processes planned for the 22nm node require overlay tolerances below 5 nm; at which point even sub-nanometer contributions must be considered. In this paper we highlight the need to characterize and control the single-layer matching among the three pattern placement mechanisms intrinsic to step&scan exposure - optical imaging, mask-to- wafer scanning, and field-to-field stepping. Without stable and near-perfect pattern placement on each layer, nanometer-scale layer-to-layer overlay tolerance is not likely to be achieved. Our approach to understanding onwafer pattern placement is based on the well-known technique of stitched field overlay. We analyze dense sampling around the field perimeter to partition the systematic contributors to pattern placement error on representative dry and immersion exposure tools.

Paper Details

Date Published: 3 March 2010
PDF: 8 pages
Proc. SPIE 7640, Optical Microlithography XXIII, 76400U (3 March 2010); doi: 10.1117/12.846847
Show Author Affiliations
Christopher P. Ausschnitt, IBM SRDC (United States)
Timothy A. Brunner, IBM SRDC (United States)
Nelson M. Felix, IBM SRDC (United States)
Blandine Minghetti, STMicroelectronics (France)


Published in SPIE Proceedings Vol. 7640:
Optical Microlithography XXIII
Mircea V. Dusa; Will Conley, Editor(s)

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