Share Email Print
cover

Proceedings Paper

Systematic and random defects control with design-based metrology
Author(s): Hyunjo Yang; Jungchan Kim; Taehyeong Lee; Areum Jung; Gyun Yoo; Donggyu Yim; Sungki Park; Toshiaki Hasebe; Masahiro Yamamoto
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

As technology node of memory devices is approaching around 30nm, the process window is becoming much narrower and production yield is getting more sensitive to tiny defects which used to be not, if ever, so critical. So it would be very hard to expect the same production yield as now in near future. It is possible to classify wafer defects into systematic and random defects. Systematic defects can be also divided into design related and process related defects. Narrow process window, generally, is thought to be the source of these systematic defects and we have to extend process window with Design for Manufacturing (DFM) and control process variation with Advanced Process Control (APC) to ensure the production yield. The sensitivity of random defects, however, has something to do with the smaller design rule itself. For example, the narrower spaces between lines are subject to bridge defects and the smaller lines, to pinch defects. Die to data base (DB) Design Based Metrology (DBM) has mainly been in use for detecting systematic defects and feedback to DFM and APC so far. We are trying to extend the application of DBM to random defects control. The conventional defect inspection systems are reaching its highest limit due to the low signal to noise ratio for extremely small feature sizes of below 40nm. It is found that Die to DB metrology tool is capable of detecting small but critical defects with reliability.

Paper Details

Date Published: 2 April 2010
PDF: 8 pages
Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 76380I (2 April 2010); doi: 10.1117/12.846739
Show Author Affiliations
Hyunjo Yang, Hynix Semiconductor Inc. (Korea, Republic of)
Jungchan Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Taehyeong Lee, Hynix Semiconductor Inc. (Korea, Republic of)
Areum Jung, Hynix Semiconductor Inc. (Korea, Republic of)
Gyun Yoo, Hynix Semiconductor Inc. (Korea, Republic of)
Donggyu Yim, Hynix Semiconductor Inc. (Korea, Republic of)
Sungki Park, Hynix Semiconductor Inc. (Korea, Republic of)
Toshiaki Hasebe, NanoGeometry Research Inc. (Japan)
Masahiro Yamamoto, NanoGeometry Research Inc. (Japan)


Published in SPIE Proceedings Vol. 7638:
Metrology, Inspection, and Process Control for Microlithography XXIV
Christopher J. Raymond, Editor(s)

© SPIE. Terms of Use
Back to Top