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Proceedings Paper

Detection of OPC conflict edges through MEEF analysis
Author(s): Li-Fu Chang; Chang-Il Choi; Guojie Cheng; Abhishek Vikram; Gary Zhang; Bo Su
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Paper Abstract

Semiconductor foundries at 65nm, 45nm, and more advanced technologies have witnessed high-yield mass production to be intimately correlated to the practice of adaptive DFM (Design for Manufacturability). With device performance variance easily exceeding 50% for 65nm and below, adaptive actions by designers, such as modifying layouts to relieve potential DFM risks, is found to be a very efficient approach to high yield manufacturing. Rigorous MEEF estimation based methods have been proposed to achieve adaptive DFM by predicting mask writing variations at early stages (cell/block levels) of designs. In a recent study, we discovered that by adding MEEF check in simulation contour based OPC verification flow, and by comparing MEEF changes of pre and post OPC hotspots, it is possible to separate OPC issues from design issues, in particular, for hotspot patterns with tight spaces with little room for any biases. We found that hotspot patterns with tight spaces usually create OPC conflict edges-correcting one edge will result in increasing MEEF at other edge, or vice versa. While advancement in OPC technology continues to improve MEEF performance, nevertheless OPC-conflicting edges almost always exist in designs at 65nm and below. In this paper, we first demonstrate the existence of OPC conflict edge hotspots using MEEF analysis. In particular, the increase of MEEF after OPC on those edges indicates that they have smaller process window than pre-OPC ones. In certain cases, design modification is necessary to correct such OPC conflicting edges. Based on the finding, we propose a practical methodology of detecting design related OPC edge conflicting hotspots in a pattern centric software-based DFM (design for manufacturability) flow. The methodology is aiming to detect patterns containing such conflicting edges, and pursuing layout actions on the design side to eliminate this issue. We will validate the flow using a real design case. In addition, the OPC edge conflicting hotspots can be clipped and saved in a designated pattern library as hotspot templates, and incoming designs can be quickly screened using exact and similar pattern search with those saved templates in the library.

Paper Details

Date Published: 2 April 2010
PDF: 8 pages
Proc. SPIE 7641, Design for Manufacturability through Design-Process Integration IV, 764111 (2 April 2010); doi: 10.1117/12.846673
Show Author Affiliations
Li-Fu Chang, Semiconductor Manufacturing International Corp. (China)
Chang-Il Choi, Semiconductor Manufacturing International Corp. (China)
Guojie Cheng, Anchor Semiconductor, Inc. (China)
Abhishek Vikram, Anchor Semiconductor, Inc. (China)
Gary Zhang, Anchor Semiconductor, Inc. (China)
Bo Su, Anchor Semiconductor, Inc. (United States)

Published in SPIE Proceedings Vol. 7641:
Design for Manufacturability through Design-Process Integration IV
Michael L. Rieger; Joerg Thiele, Editor(s)

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