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Proceedings Paper

Fabrication of dual damascene BEOL structures using a multilevel multiple exposure (MLME) scheme, part 2: RIE-based pattern transfer and completion of dual damascene process yielding an electrically functional via chain
Author(s): Stefan Harrer; John C. Arnold; Dario L. Goldfarb; Steven J. Holmes; Rex Chen; Cherry Tang; Mark Slezak; Nicolette Fender; Ronald A. Della Guardia; Eric A. Joseph; Sebastian U. Engelmann; Shyng-Tsong Chen; Dave Horak; Yunpeng Yin; Rao P. Varanasi; Matthew E. Colburn
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Paper Abstract

A novel back-end-of-line (BEOL) patterning and integration process termed Multi-Level Multiple Exposure (MLME) technique is herein introduced. The MLME technique simplifies BEOL dual damascene (DD) integration while simultaneously being applicable to all BEOL levels. It offers a patterning resolution reaching into the sub-100nm region and improves semiconductor manufacturing cost and throughput. MLME employs a dual-layer imaging stack (via + trench resists) cast onto a customized etch transfer multilayer stack. This process implements a strict litho-litho-etch sequence for transferring the trench- and via-patterns into the dielectric layer. Under the MLME scheme, two imaging steps (i.e. via- and trench-level patterning) are executed consecutively followed by a dry etch process that transfers the lithographically-formed patterns into the customized etch transfer multilayer stack and further into the dielectric layer. The MLME integration scheme not only decreases the number of overall process steps for the full DD BEOL process but also eliminates several inter-tool wafer exchange sequences as performed in a conventional litho-etch-litho-etch process flow. All MLME process steps were demonstrated i.e. combined 193nm-dry dual-resist layer MLME via- and trench-lithography, full pattern transfer of via- and trench-patterns into the dielectric layer using reactive ion etching (RIE), as well as electroplating and polishing of the DD patterns. This paper provides a detailed description of both post-lithography steps of the DD process for a DD BEOL structure, i.e. (i) the RIE-pattern transfer process with the customized multilayer stack, and (ii) the metallization process completing the DD process for one BEOL layer. Furthermore, the integration capabilities of the MLME technique were demonstrated and characterized by generating an electrically functional via-chain connecting two neighboring BEOL layers fabricated by subsequently applying the MLME approach to both layers. An exhaustive description and evaluation of MLME lithographic patterning is given in an accompanying paper.

Paper Details

Date Published: 29 March 2010
PDF: 12 pages
Proc. SPIE 7639, Advances in Resist Materials and Processing Technology XXVII, 763919 (29 March 2010); doi: 10.1117/12.846593
Show Author Affiliations
Stefan Harrer, Albany Nanotech Institute (United States)
John C. Arnold, Albany Nanotech Institute (United States)
Dario L. Goldfarb, IBM Thomas J. Watson Research Ctr. (United States)
Steven J. Holmes, Albany Nanotech Institute (United States)
Rex Chen, IBM Corp. (United States)
Cherry Tang, JSR Micro, Inc. (United States)
Mark Slezak, JSR Micro, Inc. (United States)
Nicolette Fender, JSR Micro, Inc. (United States)
Ronald A. Della Guardia, IBM Thomas J. Watson Research Ctr. (United States)
Eric A. Joseph, IBM Thomas J. Watson Research Ctr. (United States)
Sebastian U. Engelmann, IBM Thomas J. Watson Research Ctr. (United States)
Shyng-Tsong Chen, Albany Nanotech Institute (United States)
Dave Horak, Albany Nanotech Institute (United States)
Yunpeng Yin, Albany Nanotech Institute (United States)
Rao P. Varanasi, IBM Corp. (United States)
Matthew E. Colburn, Albany Nanotech Institute (United States)


Published in SPIE Proceedings Vol. 7639:
Advances in Resist Materials and Processing Technology XXVII
Robert D. Allen, Editor(s)

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