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Proceedings Paper

Mask registration and wafer overlay
Author(s): Chulseung Lee; Changjin Bang; Myoungsoo Kim; Hyosang Kang; Dohwa Lee; Woonjae Jeong; Ok-Sung Lim; Seunghoon Yoon; Jaekang Jung; Frank Laske; Lidia Parisoli; Klaus-Dieter Roeth; John C. Robinson; Sven Jug; Pavel Izikson; Berta Dinu; Amir Widmann; DongSub Choi
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Paper Abstract

Overlay continues to be one of the key challenges for lithography in advanced semiconductor manufacturing. It becomes even more challenging due to the continued shrinking of the device node. Some low k1 techniques, such as Double Exposure and Double Patterning also add additional loss of the overlay margin due to the fact that the single layer pattern is created based on more than 1 exposure. Therefore, the overlay between 2 exposures requires very tight overlay specification. Mask registration is one of the major contributors to wafer overlay, especially field related overlay. We investigated mask registration and wafer overlay by co-analyzing the mask data and the wafer overlay data. To achieve the accurate cohesive results, we introduced the combined metrology mark which can be used for both mask registration measurement as well as for wafer overlay measurement. Coincidence of both metrology marks make it possible to subtract mask signature from wafer overlay without compromising the accuracy due to the physical distance between measurement marks, if we use 2 different marks for both metrologies. Therefore, it is possible to extract pure scanner related signatures, and to analyze the scanner related signatures in details to in order to enable root cause analysis and ultimately drive higher wafer yield. We determined the exact mask registration error in order to decompose wafer overlay into mask, scanner, process and metrology. We also studied the impact of pellicle mounting by comparison of mask registration measurement pre-pellicle mounting and post-pellicle mounting in this investigation.

Paper Details

Date Published: 1 April 2010
PDF: 10 pages
Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 76382I (1 April 2010); doi: 10.1117/12.846321
Show Author Affiliations
Chulseung Lee, Hynix Semiconductor Inc. (Korea, Republic of)
Changjin Bang, Hynix Semiconductor Inc. (Korea, Republic of)
Myoungsoo Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Hyosang Kang, Hynix Semiconductor Inc. (Korea, Republic of)
Dohwa Lee, KLA-Tencor Korea (Korea, Republic of)
Woonjae Jeong, KLA-Tencor Korea (Korea, Republic of)
Ok-Sung Lim, KLA-Tencor Korea (Korea, Republic of)
Seunghoon Yoon, KLA-Tencor Korea (Korea, Republic of)
Jaekang Jung, KLA-Tencor Korea (Korea, Republic of)
Frank Laske, KLA-Tencor MIE GmbH (Germany)
Lidia Parisoli, KLA-Tencor MIE GmbH (Germany)
Klaus-Dieter Roeth, KLA-Tencor MIE GmbH (Germany)
John C. Robinson, KLA-Tencor Texas (United States)
Sven Jug, KLA-Tencor Texas (United States)
Pavel Izikson, KLA-Tencor Israel (Israel)
Berta Dinu, KLA-Tencor Israel (Israel)
Amir Widmann, KLA-Tencor Corp. (United States)
DongSub Choi, KLA-Tencor Korea (Korea, Republic of)

Published in SPIE Proceedings Vol. 7638:
Metrology, Inspection, and Process Control for Microlithography XXIV
Christopher J. Raymond, Editor(s)

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