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Proceedings Paper

3D integration opportunities, issues, and solutions: a designer's perspective
Author(s): Ding-Ming Kwai; Cheng-Wen Wu
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Paper Abstract

As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective.

Paper Details

Date Published: 8 December 2009
PDF: 10 pages
Proc. SPIE 7520, Lithography Asia 2009, 752003 (8 December 2009); doi: 10.1117/12.845747
Show Author Affiliations
Ding-Ming Kwai, Industrial Technology Research Institute (Taiwan)
Cheng-Wen Wu, National Tsing Hua Univ. (Taiwan)
Industrial Technology Research Institute (Taiwan)


Published in SPIE Proceedings Vol. 7520:
Lithography Asia 2009
Alek C. Chen; Woo-Sung Han; Burn J. Lin; Anthony Yen, Editor(s)

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