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Proceedings Paper

EUV lithography for 22nm half pitch and beyond: exploring resolution, LWR, and sensitivity tradeoffs
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Paper Abstract

The International Technology Roadmap for Semiconductors (ITRS) denotes Extreme Ultraviolet (EUV) lithography as a leading technology option for realizing the 22nm half pitch node and beyond. Readiness of EUV materials is currently one high risk area according to recent assessments made at the 2009 EUVL Symposium. The main development issue regarding EUV resist has been how to simultaneously achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the strategy and current status of EUV resist development at Intel Corporation. Data collected utilizing Intel's Micro-Exposure Tool (MET) is presented in order to examine the feasibility of establishing a resist process that simultaneously exhibits ≤22nm half-pitch (HP) L/S resolution at ≤ 12.5mJ/cm2 with ≤ 4nm LWR.

Paper Details

Date Published: 20 March 2010
PDF: 7 pages
Proc. SPIE 7636, Extreme Ultraviolet (EUV) Lithography, 76360P (20 March 2010); doi: 10.1117/12.842408
Show Author Affiliations
E. Steve Putna, Intel Corp. (United States)
Todd R. Younkin, Intel Corp. (United States)
Roman Caudillo, Intel Corp. (United States)
Manish Chandhok, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 7636:
Extreme Ultraviolet (EUV) Lithography
Bruno M. La Fontaine, Editor(s)

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