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Proceedings Paper

Low temperature plasma-enhanced ALD enables cost-effective spacer defined double patterning (SDDP)
Author(s): Julien Beynet; Patrick Wong; Andy Miller; Sabrina Locorotondo; Diziana Vangoidsenhoven; Tae-Ho Yoon; Marc Demand; Hyung-Sang Park; Tom Vandeweyer; Hessel Sprey; Yong-Min Yoo; Mireille Maenhoudt
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Paper Abstract

The inherent advantages of the Plasma-Enhanced Atomic Layer Deposition (PEALD) technology—excellent conformality and within wafer uniformity, no loading effect—overcome the limitations in this domain of the standard PECVD technique for spacer deposition. The low temperature process capability of PEALD silicon oxide enables direct spacer deposition on photoresist, thus suppressing the need of a patterned template hardmask to design the spacers. By decreasing the number of deposition and patterning steps, this so-called Direct Spacer Defined Double Patterning (DSDDP) integration reduces cost and complexity of the conventional SDDP approach. A successful integration is reported for 32 nm half-pitch polysilicon lines. The performances are promising, especially from the lines, which result from the PEALD spacers: Critical Dimension Uniformity (CDU) of 1.3 nm and Line Width Roughness (LWR) of 2.0 nm.

Paper Details

Date Published: 12 December 2009
PDF: 7 pages
Proc. SPIE 7520, Lithography Asia 2009, 75201J (12 December 2009); doi: 10.1117/12.836979
Show Author Affiliations
Julien Beynet, ASM Belgium (Belgium)
Patrick Wong, IMEC (Belgium)
Andy Miller, IMEC (Belgium)
Sabrina Locorotondo, IMEC (Belgium)
Diziana Vangoidsenhoven, IMEC (Belgium)
Tae-Ho Yoon, ASM Genitech Korea Ltd. (Korea, Republic of)
Marc Demand, IMEC (Belgium)
Hyung-Sang Park, ASM Genitech Korea Ltd. (Korea, Republic of)
Tom Vandeweyer, IMEC (Belgium)
Hessel Sprey, ASM Belgium (Belgium)
Yong-Min Yoo, ASM Genitech Korea Ltd. (Korea, Republic of)
Mireille Maenhoudt, IMEC (Belgium)


Published in SPIE Proceedings Vol. 7520:
Lithography Asia 2009
Alek C. Chen; Woo-Sung Han; Burn J. Lin; Anthony Yen, Editor(s)

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