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Proceedings Paper

Research and design of high speed mass image storage system
Author(s): Yu-feng Li; Rong-kun Xue; Fei Liang
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Paper Abstract

The design of the high mass image storage system is introduced using DSP, FPGA and Flash structure. Texas Instruments Corporation DSP chip (TMS320VC5509APEG) is used as the main controller, Samsung's Flash chips (K9F2G08U0M) used as the main storage medium, and the Xilinx Corporation FPGA chip (XCV600E) used as logic control modules. In this system, Storage module consists of 32 Flash memory chips, which are divided into 8 groups that correspond to 8-level pipeline. The 4-Flash memory chip forms a basic 32-bit memory module. The entire system storage space is 64 G bit. Through simulation and verification, the storage speed is up to 352Mbps and readout speed is up to 290Mbps, it can meet the demand to the high-speed access, and which has strong environmental adaptability.

Paper Details

Date Published: 5 August 2009
PDF: 8 pages
Proc. SPIE 7383, International Symposium on Photoelectronic Detection and Imaging 2009: Advances in Infrared Imaging and Applications, 73831V (5 August 2009); doi: 10.1117/12.836717
Show Author Affiliations
Yu-feng Li, Shenyang Institute of Aeronautical Engineering (China)
Rong-kun Xue, Shenyang Institute of Aeronautical Engineering (China)
Fei Liang, Shenyang Institute of Aeronautical Engineering (China)


Published in SPIE Proceedings Vol. 7383:
International Symposium on Photoelectronic Detection and Imaging 2009: Advances in Infrared Imaging and Applications

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