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Proceedings Paper

Floating-point arithmetic in embedded and reconfigurable computing systems
Author(s): Syed Gilani; Michael Schulte; Katherine Compton; Neil Hockert
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Paper Abstract

Modern embedded and reconfigurable systems need to support a wide range of applications, many of which may significantly benefit from hardware support for floating-point arithmetic. Some of these applications include 3D graphics, multiple-input multiple-output (MIMO) wireless communication algorithms, orthogonal frequency division multiplexing (OFDM) based systems, and digital filters. Many of these applications have real-time constraints that cannot tolerate the high latency of software emulated floating-point arithmetic. Moreover, software emulation can lead to higher energy consumption that may be unsuitable for applications in powerconstrained environments. This paper examines applications that can potentially benefit from hardware support for floating-point arithmetic and discusses some approaches taken for floating-point arithmetic in embedded and reconfigurable systems. Precision and range analysis is performed on emerging applications in the MIMO wireless communications domain to investigate the potential for low power floating-point units that utilize reduced precision and exponent range.

Paper Details

Date Published: 3 September 2009
PDF: 14 pages
Proc. SPIE 7444, Mathematics for Signal and Information Processing, 74440M (3 September 2009); doi: 10.1117/12.828388
Show Author Affiliations
Syed Gilani, Univ. of Wisconsin-Madison (United States)
Michael Schulte, Univ. of Wisconsin-Madison (United States)
Katherine Compton, Univ. of Wisconsin-Madison (United States)
Neil Hockert, Univ. of Wisconsin-Madison (United States)

Published in SPIE Proceedings Vol. 7444:
Mathematics for Signal and Information Processing
Franklin T. Luk; Mark S. Schmalz; Gerhard X. Ritter; Junior Barrera; Jaakko T. Astola, Editor(s)

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