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Proceedings Paper

Investigation of the development process for high-precision patterning
Author(s): Junichi Watanabe; Tsukasa Yamazaki; Masahito Tanabe; Toru Komizo; Amy E. Zweber; Adam C. Smith
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Paper Abstract

Photomask feature size has decreased in accordance with constant downscaling of semiconductor device size with generation changes in every 2-3 years, as in the ITRS Roadmap. However, since exposure wavelength has been unable to keep its pace with decreasing feature size, resolution enhancement techniques have been used to bring the generation changes in photomask technologies. A typical resolution enhancement technique of using sub-resolution assist features (SRAF) requires patterning of small features and that increases difficulties in mask manufacturing. Under such circumstances, we are presenting a study focusing on EB-resist development in the manufacturing process. In this paper, we study and report development methods aiming to improve develop loading effect and resolution limit.

Paper Details

Date Published: 11 May 2009
PDF: 11 pages
Proc. SPIE 7379, Photomask and Next-Generation Lithography Mask Technology XVI, 73790B (11 May 2009); doi: 10.1117/12.824252
Show Author Affiliations
Junichi Watanabe, Toppan Printing Co., Ltd. (Japan)
Tsukasa Yamazaki, Toppan Printing Co., Ltd. (Japan)
Masahito Tanabe, Toppan Printing Co., Ltd. (Japan)
Toru Komizo, Toppan Photomasks Inc. (United States)
Amy E. Zweber, IBM Corp. (United States)
Adam C. Smith, IBM Corp. (United States)

Published in SPIE Proceedings Vol. 7379:
Photomask and Next-Generation Lithography Mask Technology XVI
Kunihiro Hosono, Editor(s)

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