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Proceedings Paper

Line edge roughness transfer during plasma etching: modeling approaches and comparison with experimental results
Author(s): Vassilios Constantoudis; George Kokkoris; Panayiota Xydi; Evangelos Gogolides; Erwine Pargon; Mickael Martin
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Paper Abstract

In this paper, both modeling and experimental results for the effects of plasma etching on photoresist Line Edge and Width Roughness (LER/LWR) and their transfer to underlayer films are presented and compared. In particular, we investigate the roughness formation on both photoresist and underlayer sidewalls during a) isotropic trimming of photoresist, b) anisotropic plasma etching and LER transfer to substrate, and c) photoresist trimming followed by anisotropic plasma etching of the substrate. The trimming process is modeled with an (2D or 3D) isotropic movement of the resist sidewall. In the anisotropic plasma etching process, the resist sidewall is used as a mask to anisotropically transfer the pattern to the underlying film. Experiments include trimming of 193nm photoresist in O2 plasma with no bias voltage and anisotropic etching of BARC and Si underlayers in CF4 and HBr/Cl2/O2 with bias. Both model and experimental results show that resist trimming causes reduction of resist LWR and increase of the correlation length and roughness exponent with trimming time. This means that surface features vs trimming time become lower, wider and with less high frequency fluctuations. In the case of anisotropic etching, model predicts noticeable reduction of LWR whereas, correlation length and roughness exponent remain almost unaffected. The first experimental results seem to confirm these predictions. As regards the resist trimming followed by anisotropic etching, modeling results predict that the intervention of an isotropic trimming process before pattern transfer does not lead to larger LWR reduction.

Paper Details

Date Published: 1 April 2009
PDF: 12 pages
Proc. SPIE 7273, Advances in Resist Materials and Processing Technology XXVI, 72732J (1 April 2009); doi: 10.1117/12.823608
Show Author Affiliations
Vassilios Constantoudis, Institute of Microelectronics, NCSR Demokritos (Greece)
George Kokkoris, Institute of Microelectronics, NCSR Demokritos (Greece)
Panayiota Xydi, Institute of Microelectronics, NCSR Demokritos (Greece)
Evangelos Gogolides, Institute of Microelectronics, NCSR Demokritos (Greece)
Erwine Pargon, Lab. des Technologies de la Microélectronique, CNRS (France)
Mickael Martin, Lab. des Technologies de la Microélectronique, CNRS (France)


Published in SPIE Proceedings Vol. 7273:
Advances in Resist Materials and Processing Technology XXVI
Clifford L. Henderson, Editor(s)

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