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Proceedings Paper

Optimization of input-constrained systems
Author(s): Suleyman Malki; Lambert Spaanenburg
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Paper Abstract

The computational demands of algorithms are rapidly growing. The naive implementation uses extended doubleprecision floating-point numbers and has therefore extreme difficulties in maintaining real-time performance. For fixedpoint numbers, the value representation pushes in two directions (value range and step size) to set the applicationdependent word size. In the general case, checking all combinations of all different values on all system inputs will easily become computationally infeasible. Checking corner cases only helps to reduce the combinatorial explosion, as still checking for accuracy and precision to limit word size remains a considerable effort. A range of evolutionary techniques have been tried where the sheer size of the problem withstands an extensive search. When the value range can be limited, the problem becomes tractable and a constructive approach becomes feasible. We propose an approach that is reminiscent of the Quine-Mc.Cluskey logic minimization procedure. Next to the conjunctive search as popular in Boolean minimization, we investigate the disjunctive approach that starts from a presumed minimal word size. To eliminate the occurrence of anomalies, this still has to be checked for larger word sizes. The procedure has initially been implemented using Java and Matlab. We have applied the above procedure to feed-forward and to cellular neural networks (CNN) as typical examples of input-constrained systems. In the case of hole-filling by means of a CNN, we find that the 1461 different coefficient sets can be reduced to 360, each giving robust behaviour on 7-bits internal words.

Paper Details

Date Published: 28 May 2009
PDF: 10 pages
Proc. SPIE 7363, VLSI Circuits and Systems IV, 736314 (28 May 2009); doi: 10.1117/12.821905
Show Author Affiliations
Suleyman Malki, Lund Univ. (Sweden)
Lambert Spaanenburg, Lund Univ. (Sweden)

Published in SPIE Proceedings Vol. 7363:
VLSI Circuits and Systems IV
Teresa Riesgo; Eduardo de la Torre; Leandro Soares Indrusiak, Editor(s)

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