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Proceedings Paper

Modeling and simulation of transistor performance shift under pattern-dependent RTA process
Author(s): Yun Ye; Frank Liu; Yu Cao
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Paper Abstract

Rapid-thermal annealing (RTA) is widely used in scaled CMOS fabrication in order to achieve ultra-shallow junction. However, recent results report systematic threshold voltage (Vth) change and increased device variation due to the RTA process [1][2]. The amount of such changes further depends on layout pattern density. In this work, a suite of thermal/TCAD simulation and compact models to accurately predict the change of transistor parameters is developed. The modeling results are validated with published silicon data, improving design predictability with advanced manufacturing process.

Paper Details

Date Published: 12 March 2009
PDF: 9 pages
Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72751T (12 March 2009); doi: 10.1117/12.816683
Show Author Affiliations
Yun Ye, Arizona State Univ. (United States)
Frank Liu, IBM Austin Research Lab. (United States)
Yu Cao, Arizona State Univ. (United States)


Published in SPIE Proceedings Vol. 7275:
Design for Manufacturability through Design-Process Integration III
Vivek K. Singh; Michael L. Rieger, Editor(s)

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