Share Email Print
cover

Proceedings Paper

Optical CD metrology model evaluation and refining for manufacturing
Author(s): S.-B. Wang; C. L. Huang; Y. H. Chiu; H. J. Tao; Y. J. Mii
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Optical critical dimension (OCD) metrology has been well-accepted as standard inline metrology tool in semiconductor manufacturing since 65nm technology node for its un-destructive and versatile advantage. Many geometry parameters can be obtained in a single measurement with good accuracy if model is well established and calibrated by transmission electron microscopy (TEM). However, in the viewpoint of manufacturing, there is no effective index for model quality and, based on that, for model refining. Even, when device structure becomes more complicated, like strained silicon technology, there are more parameters required to be determined in the afterward measurement. The model, therefore, requires more attention to be paid to ensure inline metrology reliability. GOF (goodness-of-fitting), one model index given by a commercial OCD metrology tool, for example, is not sensitive enough while correlation and sensitivity coefficient, the other two indexes, are evaluated under metrology tool noise only and not directly related to inline production measurement uncertainty. In this article, we will propose a sensitivity matrix for measurement uncertainty estimation in which each entry is defined as the correlation coefficient between the corresponding two floating parameters and obtained by linearization theorem. The uncertainty is estimated in combination of production line variation and found, for the first time, much larger than that by metrology tool noise alone that indicates model quality control is critical for nanometer device production control. The uncertainty, in comparison with production requirement, also serves as index for model refining either by grid size rescaling or structure model modification. This method is verified by TEM measurement and, in the final, a flow chart for model refining is proposed.

Paper Details

Date Published: 23 March 2009
PDF: 10 pages
Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 72721M (23 March 2009); doi: 10.1117/12.815015
Show Author Affiliations
S.-B. Wang, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
C. L. Huang, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
Y. H. Chiu, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
H. J. Tao, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
Y. J. Mii, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 7272:
Metrology, Inspection, and Process Control for Microlithography XXIII
John A. Allgair; Christopher J. Raymond, Editor(s)

© SPIE. Terms of Use
Back to Top