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Proceedings Paper

EUV-patterning characterization using a 3D mask simulation and field EUV scanner
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Paper Abstract

In the field of lithography technology, EUV lithography can be a leading candidate for sub-30 nm technology node. EUVL expose system has different characteristics compared to DUV exposure system. EUV source wavelength is short and no material is transparent to the source. So off-axis reflective optic system is used for patterning in place of on-axis refractive system of DUV system. And different reticle design is needed that consists of 40 pair of Mo/Si multi layer and absorber layer in place of conventional mask. Because of the oblique incidence on the mask, shadowing effect is occurred such as pattern asymmetry, shift and pattern bias depending on pattern orientation. For non-telecentric characteristics of EUV scanner, shadowing effect produces CD variation versus field position[1][2]. Besides, it is well known that EUV scanner has bigger flare than conventional DUV scanner. Therefore, the correction of mask shadowing effect and flare level are one of the important issues for EUV lithography. In this paper, process window and MEF of EUV lithography has been examined by 3D mask simulation. CD variation by shadowing is simulated for various pattern orientations. A shadowing correction method has been calculated due to field position to reduce shadowing effect. And the correction effect is examined by simulation and Experimental results. Principle of radial overlay shift due to field position is verified then the shift length of line and space pattern is calculated.

Paper Details

Date Published: 17 March 2009
PDF: 10 pages
Proc. SPIE 7271, Alternative Lithographic Technologies, 72711G (17 March 2009); doi: 10.1117/12.814407
Show Author Affiliations
Jun-Taek Park, Hynix Semiconductor Inc. (Korea, Republic of)
Yoon-Suk Hyun, Hynix Semiconductor Inc. (Korea, Republic of)
Chang-Moon Lim, Hynix Semiconductor Inc. (Korea, Republic of)
Tae-Seung Eom, Hynix Semiconductor Inc. (Korea, Republic of)
Sunyoung Koo, Hynix Semiconductor Inc. (Korea, Republic of)
Sarohan Park, Hynix Semiconductor Inc. (Korea, Republic of)
Suk-Kyun Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Keun-Do Ban, Hynix Semiconductor Inc. (Korea, Republic of)
Hyun-Jo Yang, Hynix Semiconductor Inc. (Korea, Republic of)
Chang-Il Oh, Hynix Semiconductor Inc. (Korea, Republic of)
Byung-Ho M. Nam, Hynix Semiconductor Inc. (Korea, Republic of)
Chang-Reol Kim, Hynix Semiconductor Inc. (Korea, Republic of)
HyeongSoo Kim, Hynix Semiconductor Inc. (Korea, Republic of)
Seung-Chan Moon, Hynix Semiconductor Inc. (Korea, Republic of)
Sungki Park, Hynix Semiconductor Inc. (Korea, Republic of)


Published in SPIE Proceedings Vol. 7271:
Alternative Lithographic Technologies
Frank M. Schellenberg; Bruno M. La Fontaine, Editor(s)

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