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Proceedings Paper

Circuit-topology driven OPC for increased performance/yield ratio
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Paper Abstract

A circuit-topology-driven approach to Optical Proximity Correction (OPC) is presented. By tailoring device critical dimension (CD) statistical distribution to the device function in the circuit, and ensuring that the CD distribution stays within the correct (possibly variable) limits during process maturation and other process changes, it can be an effective tool for optimizing circuit's performance/yield tradeoff in high-volume manufacturing. Calibre's proprietary Programmable Electrical Rule Checks (PERC) module is used to recognize the topology. Alternatively, an external static timing tool can be used to identify critical devices.

Paper Details

Date Published: 12 March 2009
PDF: 7 pages
Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72751A (12 March 2009); doi: 10.1117/12.814367
Show Author Affiliations
Edmund Pierzchala, Mentor Graphics Corp. (United States)
Fedor Pikus, Mentor Graphics Corp. (United States)
J. Andres Torres, Mentor Graphics Corp. (United States)


Published in SPIE Proceedings Vol. 7275:
Design for Manufacturability through Design-Process Integration III
Vivek K. Singh; Michael L. Rieger, Editor(s)

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