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Proceedings Paper

Etch aware optical proximity correction: a first step toward integrated pattern engineering
Author(s): D. N. Dunn; S. Mansfield; I. Stobert; C. Sarma; G. Lembach; J. Liu; K. Herold
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Paper Abstract

We present an etch-aware optical proximity correction (OPC) flow that is intended to optimize post-etch patterns on wafer. We take advantage of resource efficient empirical etch models and a model based retargeting scheme to determine post-develop in-plane resist targets required to achieve post-etch critical dimensions. The goal of this flow is to optimize final patterns on wafer rather than two independent patterns from lithography and etch. As part of this flow, we cover important aspects of etch process variability implications for etch aware OPC. Metrics for total pattern transfer are developed and explored with an eye toward optimizing pattern transfer. We present results from a 45 nm poly-silicon and 32 nm shallow trench isolation levels where etch aware OPC has been applied and compare these results with conventional resist based OPC schemes. Finally, implications of this flow for unit process developers in lithography and reactive ion etch are explored. We present a process optimization flow that incorporates model based retargeting into resolution enhancement technology selection, materials selection as well as lithographic and reactive ion etch process development.

Paper Details

Date Published: 16 March 2009
PDF: 9 pages
Proc. SPIE 7274, Optical Microlithography XXII, 727412 (16 March 2009); doi: 10.1117/12.814224
Show Author Affiliations
D. N. Dunn, IBM STG/GES (United States)
S. Mansfield, IBM STG/GES (United States)
I. Stobert, IBM STG/GES (United States)
C. Sarma, Infineon Technologies (United States)
G. Lembach, Advanced Micro Devices (United States)
J. Liu, Chartered Semiconductor (United States)
K. Herold, Infineon Technologies (United States)


Published in SPIE Proceedings Vol. 7274:
Optical Microlithography XXII
Harry J. Levinson; Mircea V. Dusa, Editor(s)

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