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Proceedings Paper

Fine trench patterns with double patterning and trench shrink technology
Author(s): Satoru Shimura; Masato Kushibiki; Tetsu Kawasaki; Ryo Tanaka; Akira Tokui; Yuuki Ishii
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Paper Abstract

As part of the trend toward finer semiconductor design rules, studies have begun in the field of semiconductor lithography technology toward the 32nm-node and 22nm-node generations. The development of various types of fine-processing technologies is underway and particular progress is being made in the development of high numerical aperture (NA) technology and extreme ultraviolet (EUV) lithography for 32nm processes and beyond. At present, however, many technical issues are still being reported. One problem of special concern relates to the forming of fine, high-density trench patterns. Here, the required process margin is difficult to achieve by existing fine-processing techniques compared to lines and space patterns, and it is predicted that this problem could be a factor in lower yields caused by pattern defects. To solve this problem, studies have begun on double patterning technology and various shrink technologies. To place the joint use of these technologies on the road toward genuine mass-production applications, it is becoming increasingly important that comprehensive efforts be made to improving the basic performance of exposure-equipment and single lithography processes, to improving the alignment accuracy in double patterning, and to extract problem points in critical-dimension (CD) and defect control toward an exposure-equipment/ coater/developer cluster tool. In the face of these technical issues, NIKON Corporation and Tokyo Electron Ltd.(TEL) have joined forces to study technology for forming fine, high-density trench patterns and have successfully developed a fine, high-density trench-pattern formation process through the joint use of double patterning technology and original Chemical Vapor Deposition (CVD)-shrink technology. This paper reports on the results of a comprehensive process evaluation of double patterning technology using lithography clusters, CVD tools and etching tools.

Paper Details

Date Published: 1 April 2009
PDF: 7 pages
Proc. SPIE 7273, Advances in Resist Materials and Processing Technology XXVI, 72730A (1 April 2009); doi: 10.1117/12.814097
Show Author Affiliations
Satoru Shimura, Tokyo Electron Kyushu Ltd. (Japan)
Masato Kushibiki, Tokyo Electron AT Ltd. (Japan)
Tetsu Kawasaki, Tokyo Electron Kyushu Ltd. (Japan)
Ryo Tanaka, Nikon Corp. (Japan)
Akira Tokui, Nikon Corp. (Japan)
Yuuki Ishii, Nikon Corp. (Japan)


Published in SPIE Proceedings Vol. 7273:
Advances in Resist Materials and Processing Technology XXVI
Clifford L. Henderson, Editor(s)

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