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Proceedings Paper

Backside EBR process performance with various wafer properties
Author(s): Tomohiro Goto; Kazuhito Shigemori; Rik Vangheluwe; Daub Erich; Masakazu Sanada
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Paper Abstract

In immersion lithography process, film stacking architecture will be necessary to avoid top coat film peeling. To achieve suitable stacking architecture for immersion lithography process, an EBR process that delivers tightly controlled film edge position and good uniformity around the wafer circumference is needed. We demonstrated a new bevel rinse system on a SOKUDO RF3 coat-and-develop track for immersion lithography. The performance of the new bevel rinse system for various wafer properties was evaluated. It was found that the bevel rinse system has a good controllability of film edge position and good uniformity around the wafer circumference. The results indicate that the bevel rinse system has a large margin for wafer centering accuracy, back side particles, wafer shape and substrates with good film edge position controllability, uniformity and clean apex. The system has been demonstrated to provide a suitable film stacking architecture for immersion lithography mass production process.

Paper Details

Date Published: 1 April 2009
PDF: 8 pages
Proc. SPIE 7273, Advances in Resist Materials and Processing Technology XXVI, 727329 (1 April 2009); doi: 10.1117/12.814079
Show Author Affiliations
Tomohiro Goto, SOKUDO Co., Ltd. (Japan)
Kazuhito Shigemori, SOKUDO Co., Ltd. (Japan)
Rik Vangheluwe, ASML (Netherlands)
Daub Erich, Siltronic AG Corp. (Germany)
Masakazu Sanada, SOKUDO Co., Ltd. (Japan)


Published in SPIE Proceedings Vol. 7273:
Advances in Resist Materials and Processing Technology XXVI
Clifford L. Henderson, Editor(s)

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