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Proceedings Paper

Feasibility of ultra-low k1 lithography for 28nm CMOS node
Author(s): Shoji Mimotogi; Kazuhiro Takahata; Takashi Murakami; Seiji Nagahara; Kazuhiro Takeda; Masaki Satake; Yosuke Kitamura; Tomoko Ojima; Hiroharu Fujise; Yuriko Seino; Tatsuhiko Ema; Hiroki Yonemitsu; Manabu Takakuwa; Shinichiro Nakagawa; Takuya Kono; Masafumi Asano; Suigen Kyoh; Hideaki Harakawa; Akiko Nomachi; Tatsuya Ishida; Shunsuke Hasegawa; Katsura Miyashita; Makoto Tominaga; Soichi Inoue
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Paper Abstract

We have designed the lithography process for 28nm node logic devices using 1.35NA scanner. In the 28nm node, we face on the ultra-low k1 lithography in which dense pattern is affected by the mask topography effect and the oblique-incidence. Using the rigorous lithography simulation considering the electro-magnetic field, we have estimated accurately the feasibility of resolution of the minimum pitch required in 28nm node. The optimum mask plate and illumination conditions have been decided by simulation. The experimental results for 28nm node show that the minimum pitch patterns and minimum SRAM cell are clearly resolved by single exposure.

Paper Details

Date Published: 16 March 2009
PDF: 8 pages
Proc. SPIE 7274, Optical Microlithography XXII, 72741F (16 March 2009); doi: 10.1117/12.814040
Show Author Affiliations
Shoji Mimotogi, Toshiba Corp. Semiconductor Co. (Japan)
Kazuhiro Takahata, Toshiba Corp. Semiconductor Co. (Japan)
Takashi Murakami, NEC Electronics Corp. (Japan)
Seiji Nagahara, NEC Electronics Corp. (Japan)
Kazuhiro Takeda, NEC Electronics Corp. (Japan)
Masaki Satake, Toshiba Corp. Semiconductor Co. (Japan)
Yosuke Kitamura, Toshiba Corp. Semiconductor Co. (Japan)
Tomoko Ojima, Toshiba Corp. Semiconductor Co. (Japan)
Hiroharu Fujise, Toshiba Corp. Semiconductor Co. (Japan)
Yuriko Seino, Toshiba Corp. Semiconductor Co. (Japan)
Tatsuhiko Ema, Toshiba Corp. Semiconductor Co. (Japan)
Hiroki Yonemitsu, Toshiba Corp. Semiconductor Co. (Japan)
Manabu Takakuwa, Toshiba Corp. Semiconductor Co. (Japan)
Shinichiro Nakagawa, Toshiba Corp. Semiconductor Co. (Japan)
Takuya Kono, Toshiba Corp. Semiconductor Co. (Japan)
Masafumi Asano, Toshiba Corp. Semiconductor Co. (Japan)
Suigen Kyoh, Toshiba Corp. Semiconductor Co. (Japan)
Hideaki Harakawa, Toshiba Corp. Semiconductor Co. (Japan)
Akiko Nomachi, Toshiba Corp. Semiconductor Co. (Japan)
Tatsuya Ishida, Toshiba Corp. Semiconductor Co. (Japan)
Shunsuke Hasegawa, Toshiba Corp. Semiconductor Co. (Japan)
Katsura Miyashita, Toshiba Corp. Semiconductor Co. (Japan)
Makoto Tominaga, NEC Electronics Corp. (Japan)
Soichi Inoue, Toshiba Corp. Semiconductor Co. (Japan)


Published in SPIE Proceedings Vol. 7274:
Optical Microlithography XXII
Harry J. Levinson; Mircea V. Dusa, Editor(s)

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