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Proceedings Paper

Defect reduction in non-topcoat resist by selective segregation removal step
Author(s): Takuya Hagiwara; Mamoru Terai; Takeo Ishibashi; Tomofumi Miyauchi; Shinya Hori; Teruhiko Kumada; Tomoya Kumagai; Atsushi Sawano; Kosuke Doi; Takeshi Matsunobe; Naoki Man; Hirofumi Seki; Yusaku Tanahashi; Tetsuro Hanawa
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Paper Abstract

A non-topcoat (non-TC) resist is a photoresist that contains a hydrophobic additive, which segregates to the surface and forms a layer to minimize surface free energy. The improvement of surface hydrophobicity and the suppression of resist component leaching were confirmed by using this segregation layer. Compared to conventional topcoat process, it is speculated that the use of non-TC resist will reduce the cost of lithographic materials, improve throughput, and will be compatible for the scanning speed improvement of immersion scanners. One issue for the non-TC resist is the possibility of increased defect generation compared to processes using topcoats. It is assumed that the high resist surface hydrophobicity and the developer insolubility of the hydrophobic additive are main factors causing the increase in defect. Therefore, it is important to work out solutions for reducing these defects to realize the non-TC resists. A process of selectively removing the hydrophobic additive between exposure and development process for the purpose of defective reduction of non-TC resist was investigated. Specifically, wet processing was performed to the wafer after exposure using an organic solvent to dissolve the hydrophobic additive. As a result, defect count was reduced to less than 1/1000 with the effective removal of the segregation layer without affecting pattern size. These results prove the effectiveness of the proposed process named 'selective segregation removal (SSR)' treatment in reducing defects for non-TC resists.

Paper Details

Date Published: 1 April 2009
PDF: 11 pages
Proc. SPIE 7273, Advances in Resist Materials and Processing Technology XXVI, 727324 (1 April 2009); doi: 10.1117/12.813643
Show Author Affiliations
Takuya Hagiwara, Renesas Technology Corp. (Japan)
Mamoru Terai, Mitsubishi Electric Corp. (Japan)
Takeo Ishibashi, Renesas Technology Corp. (Japan)
Tomofumi Miyauchi, Renesas Technology Corp. (Japan)
Shinya Hori, Renesas Semiconductor Engineering Corp. (Japan)
Teruhiko Kumada, Mitsubishi Electric Corp. (Japan)
Tomoya Kumagai, Tokyo Ohka Kogyo Co., Ltd. (Japan)
Atsushi Sawano, Tokyo Ohka Kogyo Co., Ltd. (Japan)
Kosuke Doi, Tokyo Ohka Kogyo Co., Ltd. (Japan)
Takeshi Matsunobe, Toray Research Ctr. Inc. (Japan)
Naoki Man, Toray Research Ctr. Inc. (Japan)
Hirofumi Seki, Toray Research Ctr. Inc. (Japan)
Yusaku Tanahashi, Toray Research Ctr. Inc. (Japan)
Tetsuro Hanawa, Renesas Technology Corp. (Japan)

Published in SPIE Proceedings Vol. 7273:
Advances in Resist Materials and Processing Technology XXVI
Clifford L. Henderson, Editor(s)

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