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Proceedings Paper

Score-based fixing guidance generation with accurate hot-spot detection method
Author(s): Yong-Hee Park; Dong-Hyun Kim; Jung-Hoe Choi; Ji-Suk Hong; Chul-Hong Park; Sang-Hoon Lee; Moon-Hyun Yoo; Jun-Dong Cho
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Paper Abstract

While predicting and removing of lithographic hot-spots are a matured practice in recent semiconductor industry, it is one of the most difficult challenges to achieve high quality detection coverage and to provide designer-friendly fixing guidance for effective physical design implementation. In this paper, we present an accurate hot-spot detection method through leveling and scoring algorithm using weighted combination of image quality parameters, i.e., normalized image log-slope (NILS), mask error enhancement factor (MEEF), and depth of focus (DOF) which can be obtained through lithography simulation. Hot-spot scoring function and severity level are calibrated with process window qualification results. Least-square regression method is used to calibrate weighting coefficients for each image quality parameter. Once scoring function is obtained with wafer results, it can be applied to various designs with the same process. Using this calibrated scoring function, we generate fixing guidance and rule for the detected hot-spot area by locating edge bias value which can lead to a hot-spot free score level. Fixing guidance is generated by considering dissections information of OPC recipe. Finally, we integrated hot-spot fixing guidance display into layout editor for the effective design implementation. Applying hot-spot scoring and fixing method to memory devices of the 50nm node and below, we could achieve a sufficient process window margin for high yield mass production.

Paper Details

Date Published: 13 March 2009
PDF: 6 pages
Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72750P (13 March 2009); doi: 10.1117/12.811840
Show Author Affiliations
Yong-Hee Park, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Sungkyunkwan Univ. (Korea, Republic of)
Dong-Hyun Kim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jung-Hoe Choi, Synopsys Korea, Inc. (Korea, Republic of)
Ji-Suk Hong, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Chul-Hong Park, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Sang-Hoon Lee, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Moon-Hyun Yoo, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jun-Dong Cho, Sungkyunkwan Univ. (Korea, Republic of)


Published in SPIE Proceedings Vol. 7275:
Design for Manufacturability through Design-Process Integration III
Vivek K. Singh; Michael L. Rieger, Editor(s)

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