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Proceedings Paper

Double dipole RET investigation for 32 nm metal layers
Author(s): Carl Babcock; Yi Zou; Derren Dunn; Zachary Baum; Zengqin Zhao; Itty Matthew; Pat LaCour
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Paper Abstract

For 32 nm test chips, aggressive resolution enhancement technology (RET) was required for 1x metal layers to enable printing minimum pitches before availability of the final 32 nm exposure tool. Using a currently installed immersion scanner with 1.2 numerical aperture (NA) for early 32 nm test chips, one of the RET strategies capable of resolving the minimum pitch with acceptable process latitude was dipole illumination. To avoid restricting the use of minimum pitch to a single orientation, we developed a double-expose/single-develop process using horizontal and vertical dipole illumination. To enable this RET, we developed algorithms to decompose general layouts, including random logic, interconnect test patterns, and SRAM designs, into two mask layers: a first exposure (E1) of predominantly vertical features, to be patterned with horizontal dipole illumination; and, a second exposure (E2) of predominantly horizontal features, to be patterned with vertical dipole illumination. We wrote this algorithm into our OPC program, which then applies sub-resolution assist features (SRAFs) separately to the E1 and E2 masks, coordinating the two to avoid problems with overlapping exposures. This was followed by two-mask OPC, using E1 and E2 as mask layers and the original layout (single layer) as the target layer. In this paper, we describe some of the issues with decomposing layout by orientation, issues that arise in SRAF application and OPC, and some approaches we examined to address these issues.

Paper Details

Date Published: 17 October 2008
PDF: 9 pages
Proc. SPIE 7122, Photomask Technology 2008, 71220R (17 October 2008); doi: 10.1117/12.801789
Show Author Affiliations
Carl Babcock, Advanced Micro Devices, Inc. (United States)
Yi Zou, Advanced Micro Devices, Inc. (United States)
Derren Dunn, IBM Microelectronics Division (United States)
Zachary Baum, IBM Microelectronics Division (United States)
Zengqin Zhao, IBM Microelectronics Division (United States)
Itty Matthew, Advanced Micro Devices, Inc. (United States)
Pat LaCour, Mentor Graphics Corp. (United States)


Published in SPIE Proceedings Vol. 7122:
Photomask Technology 2008
Hiroichi Kawahira; Larry S. Zurbrick, Editor(s)

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