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Proceedings Paper

Controlling linewidth roughness in step and flash imprint lithography
Author(s): Gerard M. Schmid; Niyaz Khusnatdinov; Cynthia B. Brooks; Dwayne LaBrake; Ecron Thompson; Douglas J. Resnick; Jordan Owens; Arnie Ford; Shiho Sasaki; Nobuhito Toyama; Masaaki Kurihara; Naoya Hayashi; Hideo Kobayashi; Takashi Sato; Osamu Nagarekawa; Mark W. Hart; Kailash Gopalakrishnan; Rohit Shenoy; Ron Jih; Ying Zhang; Edmund Sikorski; Mary Beth Rothwell; Shusuke Yoshitake; Hitoshi Sunaoshi; Kenichi Yasui
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Paper Abstract

Despite the remarkable progress made in extending optical lithography to deep sub-wavelength imaging, the limit for the technology seems imminent. At 22nm half pitch design rules, neither very high NA tools (NA 1.6), nor techniques such as double patterning are likely to be sufficient. One of the key challenges in patterning features with these dimensions is the ability to minimize feature roughness while maintaining reasonable process throughput. This limitation is particularly challenging for electron and photon based NGL technologies, where fast chemically amplified resists are used to define the patterned images. Control of linewidth roughness (LWR) is critical, since it adversely affects device speed and timing in CMOS circuits. Imprint lithography has been included on the ITRS Lithography Roadmap at the 32 and 22 nm nodes. This technology has been shown to be an effective method for replication of nanometer-scale structures from a template (imprint mask). As a high fidelity replication process, the resolution of imprint lithography is determined by the ability to create a master template having the required dimensions. Although the imprint process itself adds no additional linewidth roughness to the patterning process, the burden of minimizing LWR falls to the template fabrication process. Non chemically amplified resists, such as ZEP520A, are not nearly as sensitive but have excellent resolution and can produce features with very low LWR. The purpose of this paper is to characterize LWR for the entire imprint lithography process, from template fabrication to the final patterned substrate. Three experiments were performed documenting LWR in the template, imprint, and after pattern transfer. On average, LWR was extremely low (less than 3nm, 3σ), and independent of the processing step and feature size.

Paper Details

Date Published: 2 May 2008
PDF: 10 pages
Proc. SPIE 6792, 24th European Mask and Lithography Conference, 67920W (2 May 2008); doi: 10.1117/12.798936
Show Author Affiliations
Gerard M. Schmid, Molecular Imprints, Inc. (United States)
Niyaz Khusnatdinov, Molecular Imprints, Inc. (United States)
Cynthia B. Brooks, Molecular Imprints, Inc. (United States)
Dwayne LaBrake, Molecular Imprints, Inc. (United States)
Ecron Thompson, Molecular Imprints, Inc. (United States)
Douglas J. Resnick, Molecular Imprints, Inc. (United States)
Jordan Owens, SEMATECH (United States)
Arnie Ford, SEMATECH (United States)
Shiho Sasaki, Dai Nippon Printing Co., Ltd. (Japan)
Nobuhito Toyama, Dai Nippon Printing Co., Ltd. (Japan)
Masaaki Kurihara, Dai Nippon Printing Co., Ltd. (Japan)
Naoya Hayashi, Dai Nippon Printing Co., Ltd. (Japan)
Hideo Kobayashi, Hoya Corp. (Japan)
Takashi Sato, Hoya Corp. (Japan)
Osamu Nagarekawa, Hoya Corp. (Japan)
Mark W. Hart, IBM Almaden Research Ctr. (United States)
Kailash Gopalakrishnan, IBM Almaden Research Ctr. (United States)
Rohit Shenoy, IBM Almaden Research Ctr. (United States)
Ron Jih, IBM Almaden Research Ctr. (United States)
Ying Zhang, IBM Thomas J. Watson Research Ctr. (United States)
Edmund Sikorski, IBM Thomas J. Watson Research Ctr. (United States)
Mary Beth Rothwell, IBM Thomas J. Watson Research Ctr. (United States)
Shusuke Yoshitake, NuFlare Technology, Inc. (Japan)
Hitoshi Sunaoshi, NuFlare Technology, Inc. (Japan)
Kenichi Yasui, NuFlare Technology, Inc. (Japan)


Published in SPIE Proceedings Vol. 6792:
24th European Mask and Lithography Conference

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