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Proceedings Paper

Model based short range mask process correction
Author(s): G. Chen; J.-S. Wang; S. Bai; R. Howell; J. Wiley; A. Vacca; T. Kurosawa; T. Nishibe; T. Takigawa
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Paper Abstract

The minimum feature size of integrated circuit continues to shrink. At 32 nm and smaller nodes, mask linearity errors caused by short range proximity effects less than around 3um during the manufacturing of photomasks become more significant in the overall lithography error budget. To address this, we have carried out a study that: (1). models the short range mask error; (2). implements mask process correction (MPC) based on these mask error models; and (3). verifies the mask process corrections. In this paper we will demonstrate that application of MPC can significantly reduce mask errors with minimal increase in writing overhead.

Paper Details

Date Published: 19 May 2008
PDF: 10 pages
Proc. SPIE 7028, Photomask and Next-Generation Lithography Mask Technology XV, 70280G (19 May 2008); doi: 10.1117/12.793024
Show Author Affiliations
G. Chen, Brion Technologies, Inc. (United States)
J.-S. Wang, Brion Technologies, Inc. (United States)
S. Bai, Brion Technologies, Inc. (United States)
R. Howell, Brion Technologies, Inc. (United States)
J. Wiley, Brion Technologies, Inc. (United States)
A. Vacca, Brion Technologies, Inc. (United States)
T. Kurosawa, Brion Technologies KK (Japan)
T. Nishibe, Brion Technologies KK (Japan)
T. Takigawa, Brion Technologies KK (Japan)

Published in SPIE Proceedings Vol. 7028:
Photomask and Next-Generation Lithography Mask Technology XV
Toshiyuki Horiuchi, Editor(s)

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